MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 446

IC MCU 25MHZ ETHERNT/PHY 112LQFP

MC9S12NE64CPV

Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64CPV

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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Chapter 17 Background Debug Module (BDMV4)
17.3
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Detailed descriptions of the registers and associated bits are given in the subsections that follow.
17.3.1
446
Memory Map and Register Definition
Register
Address
Module Memory Map
8–
7
Reserved
BDM Status Register (BDMSTS)
Reserved
BDM CCR Holding Register (BDMCCR)
BDM Internal Register Position (BDMINR)
Reserved
MC9S12NE64 Data Sheet, Rev. 1.1
Table 17-1. INT Memory Map
Use
Figure
17-2. Registers are accessed by
Freescale Semiconductor
Access
R/W
R/W
R

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