MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 545

IC MCU 25MHZ ETHERNT/PHY 112LQFP

MC9S12NE64CPV

Manufacturer Part Number
MC9S12NE64CPV
Description
IC MCU 25MHZ ETHERNT/PHY 112LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12NE64CPV

Mfg Application Notes
MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, Ethernet, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 3.465 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
70
Number Of Timers
16 bit
Operating Supply Voltage
- 0.3 V to + 3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 65 C
On-chip Adc
10 bit
For Use With
EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No RoHS Version Available

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B.1.2
A 3.3-V power supply is required. This power supply shall be compatible with Table A-7. Supply
Current Characteristics.
B.1.3
For basic operation of the MC9S12NE64, a 25-MHz crystal is required to provide the clock input to the
integrated PHY. The crystal must connect to the MC9S12NE64 in a Pierce configuration by the XTAL and
EXTAL pins as shown in Figure B-1.
In addition to providing a 25-MHz crystal input, to operate at 100 Mbps, the internal bus clock must be
configured as shown in the EPHY electrical characteristics.
B.1.4
Figure B-2 provides a close-up view of the EPHY pin connections to a high-speed LAN magnetics
isolation module and RJ45 Ethernet connector.
B.1.5
The EPHY can be configuring by software to drive indicator pins (PTL[5:0]) automatically by setting the
LEDEN bit of the EPHY EPHYCTL0 register. When LEDEN = 1, PTL[5:0] pins are dedicated to the
EPHY.
Freescale Semiconductor
Power Supply Notes
Clocking Notes
EPHY Notes
EPHY LED Indicator Notes
Figure B-2. Ethernet Interface Circuitry
MC9S12NE64 Data Sheet, Rev. 1.1
Introduction
545

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