MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 331

• Manufacturer Part Number: MC9S12NE64CPV
• Description: IC MCU 25MHZ ETHERNT/PHY 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64CPV

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

The frame length is defined to be 64 bytes at minimum and 1518 bytes at maximum, excluding the
preamble and SFD. Transmission and reception of each byte of data is performed one nibble at a time
across the MII interface with the order of nibble as shown in
11.4.1.1 Preamble and SFD
The preamble is a 56-bit field that consists of a fixed pattern of alternating 1s and 0s.
1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010 1010
The left-most 1 value represents the byte LSB and the right-most 0 value represents the byte MSB.
The SFD field is the sequence 10101011 and immediately follows the preamble pattern. The preamble and
SFD are used to allow the Ethernet interfaces on the network to synchronize themselves with the incoming
data stream before the data fields arrive.
The EMAC does not require any preamble before the SFD byte. If a preamble is detected, the preamble
must be a valid preamble pattern until the SFD or else the frame is dropped.
11.4.1.2 Address Fields
Each frame contains two address fields: the destination address field and the source address field, in that
order. The destination address field specifies the network node(s) for which the frame is intended. The
source address field specifies the network node that sent the frame.
A 48-bit address is written as 12 hexadecimal digits with the digits paired in groups of two, representing
a byte of information. The byte order of transmission on the network is from the most- to least-significant
byte. The transmission order within the byte, however, is starting from the least-significant bit (LSB) of
the byte through the most-significant bit (MSB). For example, an Ethernet address that is written as the
Freescale Semiconductor
First
Bit
LSB
MSB
D0
D1
D2
D3
LSB
D0
MII Nibble
Figure 11-23. MII Nibble/Byte-to-Byte/Nibble Mapping
First Nibble
D1
MC9S12NE64 Data Sheet, Rev. 1.1
D2
D3
Second Nibble
D4
Figure 11-23
D5
D6
MSB
D7
Functional Description
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