MC9S12NE64CPV Freescale Semiconductor, MC9S12NE64CPV Datasheet - Page 63

• Manufacturer Part Number: MC9S12NE64CPV
• Description: IC MCU 25MHZ ETHERNT/PHY 112LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12NE64CPV

• Mfg Application Notes: MC9S12NE64 Integrated Ethernet Controller Implementing an Ethernet Interface with the MC9S12NE64 Web Server Development with MC9S12NE64 and Open TCP
• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.375 V ~ 3.465 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 16 bit
• Operating Supply Voltage: - 0.3 V to + 3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 65 C
• On-chip Adc: 10 bit
• For Use With: EVB9S12NE64E - BOARD EVAL FOR 9S12NE64DEMO9S12NE64E - DEMO BOARD FOR 9S12NE64
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Freescale Semiconductor
Vector
through
through
No.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
63
$FFDE, $FFDF
$FFDC, $FFDD
$FFDA, $FFDB
$FFD8, $FFD9
$FFD6, $FFD7
$FFD4, $FFD5
$FFD2, $FFD3
$FFD0, $FFD1
$FFCE, $FFCF
$FFCC, $FFCD
$FFCA, $FFCB
$FFC8, $FFC9
$FFC6, $FFC7
$FFC4, $FFC5
$FFC2, $FFC3
$FFC0, $FFC1
$FFBA to $FFBF
$FFB8, $FFB9
$FFB6, $FFB7
$FFB4, $FFB5
$FFB2, $FFB3
$FFB0, $FFB1
$FFAE, $FFAF
$FFAC, $FFAD
$FFAA, $FFAB
$FFA8, $FFA9
$FFA6, $FFA7
$FFA4, $FFA5
$FFA2, $FFA3
$FFA0, $FFA1
$FF80 to $FF9F
Address
Vector
Vemacbrxerr
Vemacrxbac EMAC receive buffer A complete
Vemacrxbbc EMAC receive buffer B complete
Vemacrxbao
Vemacrxbbo
Vemacrxerr
Vemacrxfc
Vtimpaovf
Vcrgplllck
Vemactxc
Vemacmii
Vemacec
Vtimpaie
Vcrgscm
Vemaclc
Vector
Vtimovf
Name
Vporth
Vportg
Vflash
Vephy
Vportj
Vsci0
Vsci1
Vspi
Vatd
Viic
Table 1-7. Interrupt Vector Locations (Continued)
EMAC MII management transfer
EMAC receive buffer A overrun
EMAC receive buffer B overrun
Pulse accumulator input edge
EMAC babbling receive error
MC9S12NE64 Data Sheet, Rev 1.0
Pulse accumulator overflow
EMAC receive flow control
EMAC frame transmission
EMAC excessive collision
Standard timer overflow
CRG self clock mode
Interrupt Source
EMAC receive error
EMAC late collision
EPHY interrupt
CRG PLL lock
complete
complete
FLASH
IIC bus
Port H
Port G
Port J
SCI0
SCI1
ATD
SPI
Reserved
Reserved
Reserved
Reserved
Reserved
Mask
CCR
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
I-Bit
FCNFG (CCIE, CBEIE)
SPCR1 (SPIE, SPTIE)
EPHYCTL0 (EPHYIE)
(TIE, TCIE, RIE, ILIE)
(TIE, TCIE, RIE, ILIE)
ATDCTL2 (ASCIE)
PACTL0 (PAOVI0)
PLLCR (LOCKIE)
IMASK (RXACIE)
IMASK (RXBCIE)
IMASK (RXAOIE)
IMASK (RXBOIE)
IMASK (MMCIE)
PLLCR (SCMIE)
T0MSK2 (T0OI)
IMASK (TXCIE)
IMASK (RFCIE)
IMASK (RXAIE)
IMASK (BREIE)
Local Enable
PTGIF (PTGIE)
PTHIF (PTHIE)
PACTL0 (PAI0)
PTJIF (PTJIE)
IMASK (ECIE)
IMASK (LCIE)
IBCR (IBIE)
SC0CR2
SC1CR2
Resets and Interrupts
HPRIO Value
to Elevate
$DE
$DC
$CE
$CC
$CA
$DA
$D8
$D6
$D4
$D2
$C6
$C4
$C0
$AE
$AC
$AA
$B8
$B6
$B4
$B2
$B0
$A8
$A6
$A4
$A2
$A0
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