IC 8051 MCU 64K FLASH 64TQFP

C8051F021-GQ

Manufacturer Part NumberC8051F021-GQ
DescriptionIC 8051 MCU 64K FLASH 64TQFP
ManufacturerSilicon Laboratories Inc
SeriesC8051F02x
C8051F021-GQ datasheets
 

Specifications of C8051F021-GQ

Program Memory TypeFLASHProgram Memory Size64KB (64K x 8)
Package / Case64-TQFP, 64-VQFPCore Processor8051
Core Size8-BitSpeed25MHz
ConnectivityEBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o32Ram Size4.25K x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 3.6 VData ConvertersA/D 8x8b, 8x12b; D/A 2x12b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Processor SeriesC8051F0xCore8051
Data Bus Width8 bitData Ram Size4.25 KB
Interface TypeI2C/SMBus/SPI/UARTMaximum Clock Frequency25 MHz
Number Of Programmable I/os32Number Of Timers4
Operating Supply Voltage2.7 V to 3.6 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsPK51, CA51, A51, ULINK2
Development Tools By SupplierC8051F020DKMinimum Operating Temperature- 40 C
On-chip Adc8-ch x 8-bit or 8-ch x 12-bitOn-chip Dac2-ch x 12-bit
No. Of I/o's32Ram Memory Size4352Byte
Cpu Speed25MHzNo. Of Timers5
No. Of Pwm Channels5Rohs CompliantYes
Data Rom Size64 KBA/d Bit Size12 bit
A/d Channels Available8Height1.05 mm
Length10 mmSupply Voltage (max)3.6 V
Supply Voltage (min)2.7 VWidth10 mm
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use With336-1200 - DEV KIT FOR F020/F021/F022/F023
Eeprom Size-Other names336-1201
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
Page 211
212
Page 212
213
Page 213
214
Page 214
215
Page 215
216
Page 216
217
Page 217
218
Page 218
219
Page 219
220
Page 220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
Page 216/272

Download datasheet (2Mb)Embed
PrevNext
C8051F020/1/2/3
21.1. UART1 Operational Modes
UART1 provides four operating modes (one synchronous and three asynchronous) selected by setting configuration
bits in the SCON1 register. These four modes offer different baud rates and communication protocols. The four
modes are summarized in Table 21.1.
Mode
Synchronization
0
Synchronous
1
Asynchronous
2
Asynchronous
3
Asynchronous
21.1.1. Mode 0: Synchronous Mode
Mode 0 provides synchronous, half-duplex communication. Serial data is transmitted and received on the RX1 pin.
The TX1 pin provides the shift clock for both transmit and receive. The MCU must be the master since it generates
the shift clock for transmission in both directions (see the interconnect diagram in Figure 21.2).
Data transmission begins when an instruction writes a data byte to the SBUF1 register. Eight data bits are transferred
LSB first (see the timing diagram in Figure 21.3), and the TI1 Transmit Interrupt Flag (SCON1.1) is set at the end of
the eighth bit time. Data reception begins when the REN1 Receive Enable bit (SCON1.4) is set to logic 1 and the RI1
Receive Interrupt Flag (SCON1.0) is cleared. One cycle after the eighth bit is shifted in, the RI1 flag is set and recep-
tion stops until software clears the RI1 bit. An interrupt will occur if enabled when either TI1 or RI1 are set.
The Mode 0 baud rate is SYSCLK / 12. RX1 is forced to open-drain in Mode 0, and an external pull-up will typically
be required.
Figure 21.2. UART1 Mode 0 Interconnect
C8051Fxxx
Figure 21.3. UART1 Mode 0 Timing Diagram
RX (data out)
TX (clk out)
RX (data in)
TX (clk out)
216
Table 21.1. UART1 Modes
Baud Clock
SYSCLK / 12
Timer 1 or 4 Overflow
SYSCLK / 32 or SYSCLK / 64
Timer 1 or 4 Overflow
TX
CLK
RX
DATA
8 Extra Outputs
MODE 0 TRANSMIT
D0
D1
D2
D3
D4
D5
MODE 0 RECEIVE
D0
D1
D2
D3
D4
D5
Rev. 1.4
Data Bits Start/Stop Bits
8
None
8
1 Start, 1 Stop
9
1 Start, 1 Stop
9
1 Start, 1 Stop
Shift
Reg.
D6
D7
D6
D7