IC 8051 MCU 64K FLASH 64TQFP

C8051F021-GQ

Manufacturer Part NumberC8051F021-GQ
DescriptionIC 8051 MCU 64K FLASH 64TQFP
ManufacturerSilicon Laboratories Inc
SeriesC8051F02x
C8051F021-GQ datasheets
 


Specifications of C8051F021-GQ

Program Memory TypeFLASHProgram Memory Size64KB (64K x 8)
Package / Case64-TQFP, 64-VQFPCore Processor8051
Core Size8-BitSpeed25MHz
ConnectivityEBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o32Ram Size4.25K x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 3.6 VData ConvertersA/D 8x8b, 8x12b; D/A 2x12b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Processor SeriesC8051F0xCore8051
Data Bus Width8 bitData Ram Size4.25 KB
Interface TypeI2C/SMBus/SPI/UARTMaximum Clock Frequency25 MHz
Number Of Programmable I/os32Number Of Timers4
Operating Supply Voltage2.7 V to 3.6 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsPK51, CA51, A51, ULINK2
Development Tools By SupplierC8051F020DKMinimum Operating Temperature- 40 C
On-chip Adc8-ch x 8-bit or 8-ch x 12-bitOn-chip Dac2-ch x 12-bit
No. Of I/o's32Ram Memory Size4352Byte
Cpu Speed25MHzNo. Of Timers5
No. Of Pwm Channels5Rohs CompliantYes
Data Rom Size64 KBA/d Bit Size12 bit
A/d Channels Available8Height1.05 mm
Length10 mmSupply Voltage (max)3.6 V
Supply Voltage (min)2.7 VWidth10 mm
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use With336-1200 - DEV KIT FOR F020/F021/F022/F023
Eeprom Size-Other names336-1201
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12.2.6. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers (SFRs). The
SFRs provide control and data exchange with the CIP-51's resources and peripherals. The CIP-51 duplicates the SFRs
found in a typical 8051 implementation as well as implementing additional SFRs used to configure and access the
sub-systems unique to the MCU. This allows the addition of new functionality while retaining compatibility with the
MCS-51™ instruction set. Table 12.2 lists the SFRs implemented in the CIP-51 System Controller.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations from 0x80 to
0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, P1, SCON, IE, etc.) are bit-addressable as well as
byte-addressable. All other SFRs are byte-addressable only. Unoccupied addresses in the SFR space are reserved for
future use. Accessing these areas will have an indeterminate effect and should be avoided. Refer to the corresponding
pages of the datasheet, as indicated in Table 12.3, for a detailed description of each register.
Table 12.2. Special Function Register (SFR) Memory Map
F8
SPI0CN
PCA0H
PCA0CPH0 PCA0CPH1 PCA0CPH2 PCA0CPH3 PCA0CPH4
F0
B
SCON1
SBUF1
E8
ADC0CN
PCA0L
PCA0CPL0 PCA0CPL1 PCA0CPL2 PCA0CPL3 PCA0CPL4
E0
ACC
XBR0
XBR1
D8
PCA0CN
PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2 PCA0CPM3 PCA0CPM4
D0
PSW
REF0CN
DAC0L
C8
T2CON
T4CON
RCAP2L
C0
SMB0CN
SMB0STA SMB0DAT SMB0ADR ADC0GTL ADC0GTH
B8
IP
SADEN0
AMX0CF
B0
P3
OSCXCN
OSCICN
A8
IE
SADDR0
ADC1CN
A0
P2
EMI0TC
98
SCON0
SBUF0
SPI0CFG
90
P1
TMR3CN
TMR3RLL TMR3RLH
88
TCON
TMOD
80
P0
SP
0(8)
1(9)
(bit addressable)
Table 12.3. Special Function Registers
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
Address
Description
ACC
0xE0
Accumulator
ADC0CF
0xBC
ADC0 Configuration
ADC0CN
0xE8
ADC0 Control
ADC0GTH
0xC5
ADC0 Greater-Than High
ADC0GTL
0xC4
ADC0 Greater-Than Low
ADC0H
0xBF
ADC0 Data Word High
ADC0L
0xBE
ADC0 Data Word Low
SADDR1
TL4
XBR2
RCAP4L
DAC0H
DAC0CN
RCAP2H
TL2
AMX0SL
ADC0CF
ADC1CF
AMX1SL
EMI0CF
P0MDOUT P1MDOUT P2MDOUT P3MDOUT
SPI0DAT
ADC1
TMR3L
TL0
TL1
TH0
DPL
DPH
P4†
2(A)
3(B)
4(C)
Rev. 1.4
C8051F020/1/2/3
WDTCN
TH4
EIP1
EIP2
RSTSRC
RCAP4H
EIE1
EIE2
DAC1L
DAC1H
DAC1CN
TH2
SMB0CR
ADC0LTL ADC0LTH
P1MDIN
ADC0L
ADC0H
P74OUT†
FLSCL
FLACL
P3IF
SADEN1
EMI0CN
SPI0CKR
CPT0CN
CPT1CN
TMR3H
P7†
TH1
CKCON
PSCTL
P5†
P6†
PCON
5(D)
6(E)
7(F)
Page No.
page 115
page 49*, page 65**
page 50*, page 66**
page 53*, page 69**
page 53*, page 69**
page 51*, page 67**
page 51*, page 67**
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