IC 8051 MCU 64K FLASH 64TQFP

C8051F021-GQ

Manufacturer Part NumberC8051F021-GQ
DescriptionIC 8051 MCU 64K FLASH 64TQFP
ManufacturerSilicon Laboratories Inc
SeriesC8051F02x
C8051F021-GQ datasheets
 


Specifications of C8051F021-GQ

Program Memory TypeFLASHProgram Memory Size64KB (64K x 8)
Package / Case64-TQFP, 64-VQFPCore Processor8051
Core Size8-BitSpeed25MHz
ConnectivityEBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o32Ram Size4.25K x 8
Voltage - Supply (vcc/vdd)2.7 V ~ 3.6 VData ConvertersA/D 8x8b, 8x12b; D/A 2x12b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Processor SeriesC8051F0xCore8051
Data Bus Width8 bitData Ram Size4.25 KB
Interface TypeI2C/SMBus/SPI/UARTMaximum Clock Frequency25 MHz
Number Of Programmable I/os32Number Of Timers4
Operating Supply Voltage2.7 V to 3.6 VMaximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsPK51, CA51, A51, ULINK2
Development Tools By SupplierC8051F020DKMinimum Operating Temperature- 40 C
On-chip Adc8-ch x 8-bit or 8-ch x 12-bitOn-chip Dac2-ch x 12-bit
No. Of I/o's32Ram Memory Size4352Byte
Cpu Speed25MHzNo. Of Timers5
No. Of Pwm Channels5Rohs CompliantYes
Data Rom Size64 KBA/d Bit Size12 bit
A/d Channels Available8Height1.05 mm
Length10 mmSupply Voltage (max)3.6 V
Supply Voltage (min)2.7 VWidth10 mm
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use With336-1200 - DEV KIT FOR F020/F021/F022/F023
Eeprom Size-Other names336-1201
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10.
VOLTAGE REFERENCE (C8051F021/3)
The internal voltage reference circuit consists of a 1.2 V, 15 ppm/°C (typical) bandgap voltage reference generator
and a gain-of-two output buffer amplifier. The internal reference may be routed via the VREF pin to external system
components or to the VREFA input pin shown in Figure 10.1. Bypass capacitors of 0.1 µF and 4.7 µF are recom-
mended from the VREF pin to AGND, as shown in Figure 10.1. See Table 10.1 for voltage reference specifications.
The VREFA pin provides a voltage reference input for ADC0 and ADC1. ADC0 may also reference the DAC0 out-
put internally, and ADC1 may reference the analog power supply voltage, via the VREF multiplexers shown in
Figure 10.1.
The Reference Control Register, REF0CN (defined in Figure 10.2) enables/disables the internal reference generator
and selects the reference inputs for ADC0 and ADC1. The BIASE bit in REF0CN enables the on-board reference
generator while the REFBE bit enables the gain-of-two buffer amplifier which drives the VREF pin. When disabled,
the supply current drawn by the bandgap and buffer amplifier falls to less than 1 µA (typical) and the output of the
buffer amplifier enters a high impedance state. If the internal bandgap is used as the reference voltage generator,
BIASE and REFBE must both be set to 1 (this includes any time a DAC is used). If the internal reference is not used,
REFBE may be set to logic 0. Note that the BIASE bit must be set to logic 1 if either ADC is used, regardless of
whether the voltage reference is derived from the on-chip reference or supplied by an off-chip source. If neither the
ADC nor the DAC are being used, both of these bits can be set to logic 0 to conserve power. Bits AD0VRS and
AD1VRS select the ADC0 and ADC1 voltage reference sources, respectively. The electrical specifications for the
Voltage Reference are given in Table 10.1.
Figure 10.1. Voltage Reference Functional Block Diagram
VDD
External
R1
Voltage
Reference
Circuit
DGND
4.7F
0.1F
Recommended Bypass
Capacitors
REF0CN
AV+
1
0
VREFA
0
1
DAC0
Ref
DAC1
VREF
x2
REFBE
Rev. 1.4
C8051F020/1/2/3
ADC1
Ref
ADC0
Ref
BIASE
Bias to
EN
ADCs,
DACs
1.2V
Band-Gap
93