C8051F021-GQ Silicon Laboratories Inc, C8051F021-GQ Datasheet - Page 33

IC 8051 MCU 64K FLASH 64TQFP

C8051F021-GQ

Manufacturer Part Number
C8051F021-GQ
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F02xr
Datasheets

Specifications of C8051F021-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F020DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 8-ch x 12-bit
On-chip Dac
2-ch x 12-bit
No. Of I/o's
32
Ram Memory Size
4352Byte
Cpu Speed
25MHz
No. Of Timers
5
No. Of Pwm Channels
5
Rohs Compliant
Yes
Data Rom Size
64 KB
A/d Bit Size
12 bit
A/d Channels Available
8
Height
1.05 mm
Length
10 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1200 - DEV KIT FOR F020/F021/F022/F023
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1201
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4.
MONEN
VREFD
XTAL1
XTAL2
VREFA
VREF0
VREF1
DGND
AGND
Name
VREF
VDD
/RST
TMS
TCK
TDO
AV+
TDI
PINOUT AND PACKAGE DEFINITIONS
37, 64,
38, 63,
11, 14
10, 13
F020
F022
Pin Numbers
90
89
26
27
28
12
16
17
15
1
2
3
4
5
24, 41,
25, 40,
F021
F023
57
56
58
59
60
61
62
17
18
19
6
5
7
8
D Out JTAG Test Data Output with internal pull-up. Data is shifted out on
A Out Crystal Output. This pin is the excitation driver for a crystal or
D I/O Device Reset. Open-drain output of internal VDD monitor. Is driven
A I/O Bandgap Voltage Reference Output (all devices).
Type
D In
D In
D In
A In
D In
A In
A In
A In
A In
Table 4.1. Pin Definitions
Description
Digital Supply Voltage. Must be tied to +2.7 to +3.6 V.
Digital Ground. Must be tied to Ground.
Analog Supply Voltage. Must be tied to +2.7 to +3.6 V.
Analog Ground. Must be tied to Ground.
JTAG Test Mode Select with internal pull-up.
JTAG Test Clock with internal pull-up.
JTAG Test Data Input with internal pull-up. TDI is latched on the
rising edge of TCK.
TDO on the falling edge of TCK. TDO output is a tri-state driver.
low when VDD is <2.7 V and MONEN is high. An external source
can initiate a system reset by driving this pin low.
Crystal Input. This pin is the return for the internal oscillator circuit
for a crystal or ceramic resonator. For a precision internal clock,
connect a crystal or ceramic resonator from XTAL1 to XTAL2. If
overdriven by an external CMOS clock, this becomes the system
clock.
ceramic resonator.
VDD Monitor Enable. When tied high, this pin enables the internal
VDD monitor, which forces a system reset when VDD is < 2.7 V.
When tied low, the internal VDD monitor is disabled.
DAC Voltage Reference Input (F021/3 only).
ADC0 and ADC1 Voltage Reference Input.
ADC0 Voltage Reference Input.
ADC1 Voltage Reference Input.
DAC Voltage Reference Input.
Rev. 1.4
C8051F020/1/2/3
33

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