MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 216
MC68HC711E9CFNE2
Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet
1.MC68HC711E9CFNE3.pdf
(336 pages)
Specifications of MC68HC711E9CFNE2
Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Price
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Analog-to-Digital (A/D) Converter
10.6 Channel Assignments
10.7 Single-Channel Operation
Technical Data
216
The multiplexer allows the A/D converter to select one of 16 analog
signals. Eight of these channels correspond to port E input lines to the
MCU, four of the channels are internal reference points or test functions,
and four channels are reserved. Refer to
The two types of single-channel operation are:
1. When SCAN = 0, the single selected channel is converted four
2. When SCAN = 1, conversions continue to be performed on the
consecutive times. The first result is stored in A/D result register 1
(ADR1), and the fourth result is stored in ADR4. After the fourth
conversion is complete, all conversion activity is halted until a new
conversion command is written to the ADCTL register.
selected channel with the fifth conversion being stored in register
ADR1 (overwriting the first conversion result), the sixth conversion
overwriting ADR2, and so on.
Analog-to-Digital (A/D) Converter
1. Used for factory testing
Table 10-1. Converter Channel Assignments
Channel
Number
9 – 12
13
14
15
16
1
2
3
4
5
6
7
8
Reserved
Reserved
(V
Channel
Signal
V
V
RH
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
RH
RL
)/2
(1)
(1)
(1)
(1)
Table
M68HC11E Family — Rev. 3.2
Result in ADRx
10-1.
if MULT = 1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
—
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