MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 83

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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M68HC11E Family — Rev. 3.2
MOTOROLA
Resets:
Single chip:
1. The reset values depend on the mode selected at the RESET pin rising edge.
Expanded:
Bootstrap:
Address:
RBOOT — Read Bootstrap ROM Bit
SMOD and MDA — Special Mode Select and Mode Select A Bits
Read:
Write:
Figure 4-9. Highest Priority I-Bit Interrupt and Miscellaneous
Test:
Valid only when SMOD is set (bootstrap or special test mode); can be
written only in special modes
The initial value of SMOD is the inverse of the logic level present on
the MODB pin at the rising edge of reset. The initial value of MDA
equals the logic level present on the MODA pin at the rising edge of
reset. These two bits can be read at any time. They can be written
anytime in special modes. MDA can be written only once in normal
modes. SMOD cannot be set once it has been cleared.
0 = Bootloader ROM disabled and not in map
1 = Bootloader ROM enabled and in map at $BE00–$BFFF
RBOOT
Operating Modes and On-Chip Memory
$103C
Bit 7
0
0
1
0
MODB
(1)
1
1
0
0
SMOD
Input
6
0
0
1
1
MODA
(1)
0
1
0
1
MDA
Register (HPRIO)
5
0
1
0
1
(1)
IRV(NE)
Special test
Single chip
Expanded
Bootstrap
Mode
4
0
0
0
1
(1)
Operating Modes and On-Chip Memory
PSEL3
3
0
0
0
0
Latched at Reset
SMOD
PSEL2
0
0
1
1
2
1
1
1
1
MDA
PSEL1
0
1
0
1
1
1
1
1
1
Technical Data
Memory Map
PSEL0
Bit 0
0
0
0
0
83

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