MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 278

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Application Note
Basic Bootstrap Mode
278
Topics discussed in this application note include:
This section describes only basic functions of the bootstrap mode. Other
functions of the bootstrap mode are described in detail in the remainder
of this application note.
When an M68HC11 is reset in bootstrap mode, the reset vector is
fetched from a small internal read-only memory (ROM) called the
bootstrap ROM or boot ROM. The firmware program in this boot ROM
then controls the bootloading process, in this manner:
Basic operation of the M68HC11 bootstrap mode
General discussion of bootstrap mode uses
Detailed explanation of on-chip bootstrap logic
Detailed explanation of bootstrap firmware
Bootstrap firmware vs. EEPROM security
Incorporating the bootstrap mode into a system
Driving bootstrap mode from another M68HC11
Driving bootstrap mode from a personal computer
Common bootstrap mode problems
Variations for specific versions of M68HC11
Commented listings for selected M68HC11 bootstrap ROMs
First, the on-chip SCI (serial communications interface) is
initialized. The first character received ($FF) determines which of
two possible baud rates should be used for the remaining
characters in the download operation.
Next, a binary program is received by the SCI system and is stored
in RAM.
Finally, a jump instruction is executed to pass control from the
bootloader firmware to the user’s loaded program.
AN1060 — Rev. 1.0
MOTOROLA

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