EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 365

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
1
Stratix III devices support decompression in the FPP (when using a
MAX II device/microprocessor + flash), fast AS, and PS configuration
schemes. The Stratix III decompression feature is not available in the
JTAG configuration scheme.
1
In PS mode, use the Stratix III decompression feature because sending
compressed configuration data reduces configuration time.
When you enable compression, the Quartus II software generates
configuration files with compressed configuration data. This compressed
file reduces the storage requirements in the configuration device or flash
memory, and decreases the time needed to transmit the bitstream to the
Stratix III device. The time required by a Stratix III device to decompress
a configuration file is less than the time needed to transmit the
configuration data to the device.
There are two ways to enable compression for Stratix III bitstreams:
before design compilation (in the Compiler Settings menu) and after
design compilation (in the Convert Programming Files window).
To enable compression in the project's Compiler Settings menu,
1.
2.
3.
Select Device under the Assignments menu to bring up the Settings
window.
After selecting your Stratix III device, open the Device and Pin
Options window
In the Configuration settings tab, enable the check box for Generate
compressed bitstreams (as shown in
Preliminary data indicates that compression typically reduces
the configuration bitstream size by 35 to 55% based on the
designs used.
When using FPP mode, the intelligent host must provide a DCLK
that is ×4 the data rate. Therefore, the configuration data must
be valid for four DCLK cycles.
Stratix III Device Handbook, Volume 1
Figure
Configuring Stratix III Devices
11–1).
11–5