EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 661

• Manufacturer Part Number: EP3SE50F780I3N
• Description: Stratix III
• Manufacturer: Altera

Altera Corporation
November 2007
RCLK output adder
RCLK PLL output adder
RCLK input adder
RCLK PLL input adder
RCLK output adder
RCLK PLL output adder
3.3-V LVTTL
Table 1–73. EP3SL110 Column Pin Delay Adders for Regional Clock
Table 1–74. EP3SL110 Row Pin Delay Adders for Regional Clock
Table 1–75. EP3SL150 Column Pins Input Timing Parameters (Part 1 of 4)
I/O Standard
Parameter
Parameter
GCLK
GCLK
Clock
PLL
Table 1–74
Regional Clock.
EP3SL150 I/O Timing Parameters
Table 1–75
parameters for EP3SL150 devices for single-ended I/O standards.
Table 1–75
single-ended I/O standards.
Industrial
Industrial
—
—
—
—
—
—
Parameter
t
t
Fast Model
SU
t
SU
t
Fast Model
H
H
specifies EP3SL150 Column Pins Input Timing parameters for
specifies EP3SL110 Row Pin delay adders when using the
through
Stratix III Device Datasheet: DC and Switching Characteristics
Commercial
Commercial
Industrial Commercial
-0.027
-0.023
-0.021
1.753
1.772
0.018
—
—
—
—
Table 1–78
Fast Model
-0.957
-0.330
V
2.658
2.678
0.056
0.133
V
0.046
1.065
0.438
1.1V
1.1V
0.05
show the maximum I/O timing
CCL
CCL
-2
-2
=
=
Stratix III Device Handbook, Volume 2
2.914
2.942
0.244
0.234
V
1.1V
V
0.126
0.129
1.1V
CCL
-3
CCL
-3
-1.388 -1.508 -1.621 -1.562 -1.910
-0.691 -0.816 -0.934 -0.878 -0.795
1.530
0.833
V
=
1.1V
=
CCL
-2
V
3.234
3.184
0.243
0.257
=
1.1V
0.245
0.213
V
1.1V
CCL
-4
CCL
-4
=
V
1.669
0.977
1.1V
=
CCL
-3
V
3.064
3.073
0.178
1.1V
=
0.19
0.201
0.173
-4L
V
CCL
1.1V
CCL
=
V
1.796
1.109
1.1V
=
CCL
-4
-4L
2.928
2.881
0.435
0.446
V
0.9V
=
-4L
CCL
V
0.407
0.423
0.9V
CCL
=
1.729
1.045
V
1.1V
=
CCL
Units
1–149
=
Units
ns
ns
ns
ns
-4L
ns
ns
V
2.071
0.956
0.9V
CCL
=
Units
ns
ns
ns
ns