EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 424
EP3SE50F780I3N
Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Introduction
Functional
Description
Figure 12–1. Functional Diagram of Stratix III Remote System Upgrade
12–2
Stratix III Device Handbook, Volume 1
Development
Location
The dedicated remote system upgrade circuitry in Stratix III devices
manage remote configuration and provides error detection, recovery,
and status information. User logic or a Nios II processor implemented in
the Stratix III device logic array provides access to the remote
configuration data source and an interface to the system's configuration
memory.
Stratix III devices have remote system upgrade processes that involves
the following steps:
1.
2.
3.
4.
Figure 12–1
configuration updates. (The numbers in the figure below coincide with
the steps above.)
A Nios II processor (or user logic) implemented in the Stratix III
device logic array receives new configuration data from a remote
location. The connection to the remote source uses a communication
protocol such as the transmission control protocol/Internet protocol
(TCP/IP), peripheral component interconnect (PCI), user datagram
protocol (UDP), universal asynchronous receiver/transmitter
(UART), or a proprietary interface.
The Nios II processor (or user logic) stores this new configuration
data in non-volatile configuration memory.
The Nios II processor (or user logic) initiates a reconfiguration cycle
with the new or updated configuration data.
The dedicated remote system upgrade circuitry detects and recovers
from any error(s) that might occur during or after the
reconfiguration cycle, and provides error status information to the
user design.
Data
Data
1
shows the steps required for performing remote
Data
Control Module
Stratix III
Device
Stratix III Configuration
3
2
Configuration
Memory
Altera Corporation
October 2007
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