EP3SE50F780I3N Altera, EP3SE50F780I3N Datasheet - Page 395
EP3SE50F780I3N
Manufacturer Part Number
EP3SE50F780I3N
Description
Stratix III
Manufacturer
Altera
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Figure 11–14. Multi-Device PS Configuration Using an External Host
Note to
(1)
Altera Corporation
November 2007
(MAX II Device or
You should connect the pull-up resistor to a supply that provides an acceptable input signal for all devices in the
chain. V
Microprocessor)
External Host
ADDR
Figure
Memory
CC
11–14:
DATA0
should be high enough to meet the V
V
CC
10 k Ω
(1)
nSTATUS and CONF_DONE low and all I/O pins are tri-stated. Once
nCONFIG returns to a logic high level and nSTATUS is released by the
device, reconfiguration begins.
Figure 11–14
device. This circuit is similar to the PS configuration circuit for a single
device, except Stratix III devices are cascaded for multi-device
configuration.
In multi-device PS configuration, the first device's nCE pin is connected
to GND while its nCEO pin is connected to nCE of the next device in the
chain. The last device's nCE input comes from the previous device, while
its nCEO pin is left floating. After the first device completes configuration
in a multi-device configuration chain, its nCEO pin drives low to activate
the second device's nCE pin, which prompts the second device to begin
configuration. The second device in the chain begins configuration within
one clock cycle. Therefore, the transfer of data destinations is transparent
to the MAX II device. All other configuration pins (nCONFIG, nSTATUS,
DCLK, DATA0, and CONF_DONE) are connected to every device in the
chain. Configuration signals can require buffering to ensure signal
integrity and prevent clock skew problems. Ensure that the DCLK and
DATA lines are buffered for every fourth device. Because all device
CONF_DONE pins are tied together, all devices initialize and enter user
mode at the same time.
V
CC
10 k Ω
(1)
GND
shows how to configure multiple devices using a MAX II
CONF_DONE
nSTATUS
nCE
DATA0
nCONFIG
DCLK
Stratix III Device 1
IH
specification of the I/O on the device and the external host.
MSEL2
MSEL1
MSEL0
nCEO
GND
V
CCPGM
Stratix III Device Handbook, Volume 1
Configuring Stratix III Devices
CONF_DONE
nSTATUS
nCE
DATA0
nCONFIG
DCLK
Stratix III Device 2
MSEL2
MSEL1
MSEL0
nCEO
N.C.
GND
V
CCPGM
11–35
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