MC8640DTHX1067NE Freescale Semiconductor, MC8640DTHX1067NE Datasheet - Page 21

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MC8640DTHX1067NE

Manufacturer Part Number
MC8640DTHX1067NE
Description
IC MPU DUAL CORE E600 1023FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC8640DTHX1067NE

Processor Type
MPC86xx PowerPC 32-Bit
Speed
1.067GHz
Voltage
0.95V
Mounting Type
Surface Mount
Package / Case
1023-FCCBGA
Processor Series
MPC8xxx
Core
e600
Development Tools By Supplier
MCEVALHPCN-8641D
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC8640DTHX1067NE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
6.2
This section provides the AC electrical characteristics for the DDR SDRAM interface.
6.2.1
Table 18
Table 19
At recommended operating conditions (see
Table 20
At recommended operating conditions (see
Freescale Semiconductor
At recommended operating conditions (see
AC input low voltage
AC input high voltage
Controller Skew for
MDQS—MDQ/MECC
533 MHz
Note:
1. t
2. The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called t
3. Maximum DDR1 frequency is 400 MHz.
AC input low voltage
AC input high voltage
will be captured with MDQS[n]. This should be subtracted from the total timing budget.
determined by the following equation: t
absolute value of t
CISKEW
provides the input AC timing specifications for the DDR2 SDRAM when Dn_GV
provides the input AC timing specifications for the DDR SDRAM when Dn_GV
provides the input AC timing specifications for the DDR SDRAM interface.
represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that
DDR SDRAM AC Electrical Characteristics
DDR SDRAM Input AC Timing Specifications
Parameter
Parameter
Parameter
400 MHz
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
Table 18. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface
Table 19. DDR SDRAM Input AC Timing Specifications for 2.5-V Interface
CISKEW
.
Table 20. DDR SDRAM Input AC Timing Specifications
Table
Table
Table
DISKEW
2)
2)
2)
Symbol
Symbol
Symbol
t
CISKEW
V
V
V
V
IH
IH
IL
IL
= ±(T ³ 4 – abs(t
D n _MV
D n _MV
CISKEW
–300
–365
Min
Min
Min
REF
REF
+ 0.25
+ 0.31
)) where T is the clock period and abs(t
D n _MV
D n _MV
Max
Max
Max
300
365
REF
REF
– 0.25
– 0.31
DISKEW
DDR and DDR2 SDRAM
.This can be
Unit
Unit
Unit
DD(typ)
ps
V
V
DD(typ)
V
V
CISKEW
= 2.5 V.
= 1.8 V.
Notes
Notes
Notes
) is the
1, 2
3
21

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