MC8640DTHX1067NE Freescale Semiconductor, MC8640DTHX1067NE Datasheet - Page 44

• Manufacturer Part Number: MC8640DTHX1067NE
• Description: IC MPU DUAL CORE E600 1023FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC8640DTHX1067NE

• Processor Type: MPC86xx PowerPC 32-Bit
• Speed: 1.067GHz
• Voltage: 0.95V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCCBGA
• Processor Series: MPC8xxx
• Core: e600
• Development Tools By Supplier: MCEVALHPCN-8641D
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

Local Bus
Figure 25
44
Output hold from local bus clock (except LAD/LDP and LALE)
Output hold from local bus clock for LAD/LDP
Local bus clock to output high Impedance (except LAD/LDP and LALE)
Local bus clock to output high impedance for LAD/LDP
Note:
1. The symbols used for timing specifications herein follow the pattern of t
2. All timings are in reference to LSYNC_IN for PLL enabled and internal local bus clock for PLL bypass mode.
3. All signals are measured from OV
4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
6. t
7. Maximum possible clock skew between a clock LCLK[m] and a relative clock LCLK[ n ]. Skew measured between
8. Guaranteed by design.
for inputs and t
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
clock one(1). Also, t
output (O) going invalid (X) or output hold time.
bypass mode to 0.4 × OV
through the component pin is less than or equal to the leakage current specification.
programmed with the LBCR[AHD] parameter.
complementary signals at BV
LBOTOT
is a measurement of the minimum time between the negation of LALE and any change in LAD. t
provides the AC test load for the local bus.
Table 41. Local Bus Timing Specifications (OV
(First two letters of functional block)(reference)(state)(signal)(state)
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
LBKHOX
Output
DD
Parameter
symbolizes local bus timing (LB) for the t
of the signal in question for 3.3-V signaling levels.
DD
÷ 2.
DD
÷ 2 of the rising edge of LSYNC_IN for PLL enabled or internal local bus clock for PLL
Figure 25. Local Bus AC Test Load
Z
0
= 50 Ω
DD
LBK
for outputs. For example, t
= 3.3 V)—PLL Enabled (continued)
Symbol
(First two letters of functional block)(signal)(state) (reference)(state)
t
t
t
t
LBKHOX1
LBKHOX2
LBKHOZ1
LBKHOZ2
LBK
clock reference (K) to go high (H), with respect to the
R
clock reference (K) goes high (H), in this case for
L
= 50 Ω
1
Min
0.7
0.7
—
—
OV
DD
LBIXKH1
/2
Max
2.5
2.5
—
—
Freescale Semiconductor
symbolizes local bus
LBOTOT
Unit
ns
ns
ns
ns
is
Notes
—
3
5
5