MC8640DTHX1067NE Freescale Semiconductor, MC8640DTHX1067NE Datasheet - Page 8

• Manufacturer Part Number: MC8640DTHX1067NE
• Description: IC MPU DUAL CORE E600 1023FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC8640DTHX1067NE

• Processor Type: MPC86xx PowerPC 32-Bit
• Speed: 1.067GHz
• Voltage: 0.95V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCCBGA
• Processor Series: MPC8xxx
• Core: e600
• Development Tools By Supplier: MCEVALHPCN-8641D
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

Electrical Characteristics
8
Platform supply voltage
Local Bus and Platform PLL supply voltage
DDR and DDR2 SDRAM I/O supply voltages
eTSEC 1 and 2 I/O supply voltage
eTSEC 3 and 4 I/O supply voltage
Local Bus, DUART, DMA, Multiprocessor Interrupts, System
Control & Clocking, Debug, Test, Power management, I
JTAG and Miscellaneous I/O voltage
Input voltage
Junction temperature range
Notes:
1. Core 1 characteristics apply only to MPC8640D
2. If two separate power supplies are used for V
3. Caution: D n
4. Caution: L/TV
5. Caution: OV
6. Timing limitations for M,L,T,O)V
7. The 2.5 V ± 125 mV range is for DDR and 1.8 V ± 90 mV range is for DDR2.
8. See
9. The PCI Express interface of the device is expected to receive signals from 0.175 to 1.2 V. For more information refer to
10. Applies to Part Number MC8640wxx1067Nz only. V
11. This voltage is the input to the filter discussed in
12. Applies to part number MC8640DTxxyyyyaz. Refer to
individual power supplies must be tracked and kept within 100 mV of each other during normal run time.
operating conditions per protocol.
Section 14.4.3, “Differential Receiver (Rx) Input Specifications.”
Part Numbering Nomenclature to determine if the device has been marked for V
the voltage at the AV
has been marked for extended operating temperature range.
Section 8.2, “FIFO, GMII, MII, TBI, RGMII, RMII, and RTBI AC Timing
_
IN
MV
IN
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
must meet the overshoot/undershoot requirements for OV
must meet the overshoot/undershoot requirements for L/TV
IN
must meet the overshoot/undershoot requirements for D n _GV
DD
Parameter
_Core n pin, which may be reduced from V
DDR and DDR2 SDRAM signals
DDR and DDR2 SDRAM reference
Three-speed Ethernet signals
DUART, Local Bus, DMA,
Multiprocessor Interrupts, System
Control & Clocking, Debug, Test,
Power management, I
and Miscellaneous I/O voltage
Table 2. Recommended Operating Conditions (continued)
IN
and D n _MV
DD
REF
2
_Core0 and V
C, JTAG
Section 20.2, “Power Supply Design and
during regular run time is provided in
DD
2
C,
_Core n = 0.95 V and V
Table 74
DD
_Core1, they must be at the same nominal voltage and the
Part Numbering Nomenclature to determine if the device
AV
D n
DD
V
D1_GV
AV
D2_GV
D n
Symbol
DD
DD
OV
TV
_
_Core n by the filter.
LV
OV
TV
DD
LV
_
_PLAT
MV
T
_PLAT
MV
DD
DD
J
DD
IN
_LB,
IN
IN
DD
REF
DD,
DD
IN
Specifications,” for details on the recommended
DD
as shown in
DD
as shown in
DD
_PLAT = 1.05 V devices. Refer to
DD
_Core n = 0.95 V.
GND to D n _GV
D n _GV
Recommended
2.5 V ± 125 mV
3.3 V ± 165 mV
2.5 V ± 125 mV
3.3 V ± 165 mV
2.5 V ± 125 mV
3.3 V ± 165 mV
as shown in
1.8 V ± 90 mV
GND to OV
1.05 ± 50 mV
1.05 ± 50 mV
GND to TV
GND to LV
–40 to 105
Figure 2
0 to 105
Figure 2
Sequencing,” and not necessarily
Value
Figure 2
DD
/2 ± 1%
DD
DD
DD
Figure
during regular run time.
Freescale Semiconductor
DD
during regular run time.
2.
Unit
o
V
V
V
V
V
V
V
V
V
V
V
V
C
Table 74
Notes
3, 6
4, 6
5,6
12
—
—
—
—
7
8
8
8
8
5
7