MC8640DTHX1067NE Freescale Semiconductor, MC8640DTHX1067NE Datasheet - Page 68

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MC8640DTHX1067NE

Manufacturer Part Number
MC8640DTHX1067NE
Description
IC MPU DUAL CORE E600 1023FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC8640DTHX1067NE

Processor Type
MPC86xx PowerPC 32-Bit
Speed
1.067GHz
Voltage
0.95V
Mounting Type
Surface Mount
Package / Case
1023-FCCBGA
Processor Series
MPC8xxx
Core
e600
Development Tools By Supplier
MCEVALHPCN-8641D
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number
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Quantity
Price
Part Number:
MC8640DTHX1067NE
Manufacturer:
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Quantity:
10 000
PCI Express
14 PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus of the MPC8640.
14.1
For more information, see
14.2
Table 48
14.3
The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)
of each other at all times. This is specified to allow bit rate clock sources with a ± 300 ppm tolerance.
14.4
The following is a summary of the specifications for the physical layer of PCI Express on this device. For
further details as well as the specifications of the transport and data link layer please use the PCI Express
Base Specification, Rev. 1.0a document.
14.4.1
Table 49
specified at the component pins.
Unit Interval
Differential
Peak-to-Peak
Output Voltage
68
REFCLK cycle time
REFCLK cycle-to-cycle jitter. Difference in the period of any two
adjacent REFCLK cycles
Phase jitter. Deviation in edge location with respect to mean edge
location
Parameter
lists AC requirements.
defines the specifications for the differential output at all transmitters. The parameters are
DC Requirements for PCI Express SD n _REF_CLK and
SD n _REF_CLK
AC Requirements for PCI Express SerDes Clocks
Clocking Dependencies
Physical Layer Specifications
Differential Transmitter (Tx) Output
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
V
Symbol
TX-DIFFp-p
Table 48. SD n _REF_CLK and SD n _REF_CLK AC Requirements
UI
Parameter
Table 49. Differential Transmitter Output Specifications
Section 13.2, “SerDes Reference Clocks.”
399.88
Min
0.8
Nom
400
400.12
Max
1.2
Units
ps
V
Symbol
t
Each UI is 400 ps ± 300 ppm. UI does not account for
spread spectrum clock dictated variations. See Note 1.
V
t
REFCJ
REFPJ
t
TX-DIFFp-p
REF
Min
–50
= 2 × |V
Typical
TX-D+
10
Notes
– V
Max
TX-D-
Freescale Semiconductor
100
50
| See Note 2.
Units
ns
ps
ps
Notes

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