MC8640DTHX1067NE Freescale Semiconductor, MC8640DTHX1067NE Datasheet - Page 77

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MC8640DTHX1067NE

Manufacturer Part Number
MC8640DTHX1067NE
Description
IC MPU DUAL CORE E600 1023FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC8640DTHX1067NE

Processor Type
MPC86xx PowerPC 32-Bit
Speed
1.067GHz
Voltage
0.95V
Mounting Type
Surface Mount
Package / Case
1023-FCCBGA
Processor Series
MPC8xxx
Core
e600
Development Tools By Supplier
MCEVALHPCN-8641D
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Manufacturer
Quantity
Price
Part Number:
MC8640DTHX1067NE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
To illustrate these definitions using real values, consider the case of a current mode logic (CML)
transmitter that has a common mode voltage of 2.25 V and each of its outputs, TD and TD, has a swing
that goes between 2.5 V and 2.0 V. Using these values, the peak-to-peak voltage swing of the signals TD
and TD is 500 mV p-p. The differential output signal ranges between 500 mV and –500 mV. The peak
differential voltage is 500 mV. The peak-to-peak differential voltage is 1000 mV p-p.
15.4
With the use of high speed serial links, the interconnect media causes degradation of the signal at the
receiver. Effects such as inter-symbol interference (ISI) or data-dependent jitter are produced. This loss
can be large enough to degrade the eye opening at the receiver beyond what is allowed in the specification.
To negate a portion of these effects, equalization can be used. The most common equalization techniques
that can be used are:
15.5
AC electrical specifications are given for transmitter and receiver. Long run and short run interfaces at
three baud rates (a total of six cases) are described.
The parameters for the AC electrical specifications are guided by the XAUI electrical interface specified
in clause 47 of IEEE 802.3ae-2002.
XAUI has similar application goals to the serial RapidIO interface. The goal of this standard is that
electrical designs for the serial RapidIO interface can reuse electrical designs for XAUI, suitably modified
for applications at the baud intervals and reaches described herein.
Freescale Semiconductor
5. The peak value of the differential transmitter output signal and the differential receiver input
6. The peak-to-peak value of the differential transmitter output signal and the differential receiver
signal is A – B volts
input signal is 2 × (A – B) volts
A passive high pass filter network placed at the receiver, often referred to as passive equalization.
The use of active circuits in the receiver, often referred to as adaptive equalization.
A Volts
B Volts
Explanatory Note on Transmitter and Receiver Specifications
Equalization
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
Figure 53. Differential Peak-Peak Voltage of Transmitter or Receiver
TD or RD
TD or RD
Differential Peak-Peak = 2 * (A-B)
Serial RapidIO
77

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