MC8640DTHX1067NE Freescale Semiconductor, MC8640DTHX1067NE Datasheet - Page 64

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MC8640DTHX1067NE

Manufacturer Part Number
MC8640DTHX1067NE
Description
IC MPU DUAL CORE E600 1023FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC8640DTHX1067NE

Processor Type
MPC86xx PowerPC 32-Bit
Speed
1.067GHz
Voltage
0.95V
Mounting Type
Surface Mount
Package / Case
1023-FCCBGA
Processor Series
MPC8xxx
Core
e600
Development Tools By Supplier
MCEVALHPCN-8641D
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC8640DTHX1067NE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
High-Speed Serial Interfaces (HSSI)
LVDS output driver features 50-Ω termination resistor. It also assumes that the LVDS transmitter
establishes its own common mode level without relying on the receiver or other external component.
Figure 45
Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with
MPC8640D SerDes reference clock input’s DC requirement, AC-coupling has to be used.
assumes that the LVPECL clock driver’s output impedance is 50 Ω. R1 is used to DC-bias the LVPECL
outputs prior to AC-coupling. Its value could be ranged from 140 Ω to 240 Ω depending on clock driver
vendor’s requirement. R2 is used together with the SerDes reference clock receiver’s 50-Ω termination
resistor to attenuate the LVPECL output’s differential peak level such that it meets the MPC8640D SerDes
reference clock’s differential input amplitude requirement (between 200 mV and 800 mV differential
peak). For example, if the LVPECL output’s differential peak is 900 mV and the desired SerDes reference
clock input amplitude is selected as 600 mV, the attenuation factor is 0.67, which requires R2 = 25 Ω.
64
LVDS CLK Driver Chip
Clock Driver
Clock Driver
Figure 44. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
CLK_Out
CLK_Out
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
10 nF
10 nF
100 Ω differential PWB trace
SD n _REF_CLK
SD n _REF_CLK
50 Ω
50 Ω
Freescale Semiconductor
MPC8640D
SerDes Refer.
CLK Receiver
Figure 45

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