MC8640DTHX1067NE Freescale Semiconductor, MC8640DTHX1067NE Datasheet - Page 80

• Manufacturer Part Number: MC8640DTHX1067NE
• Description: IC MPU DUAL CORE E600 1023FCCBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC8640DTHX1067NE

• Processor Type: MPC86xx PowerPC 32-Bit
• Speed: 1.067GHz
• Voltage: 0.95V
• Mounting Type: Surface Mount
• Package / Case: 1023-FCCBGA
• Processor Series: MPC8xxx
• Core: e600
• Development Tools By Supplier: MCEVALHPCN-8641D
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

Serial RapidIO
For each baud rate at which an LP-Serial transmitter is specified to operate, the output eye pattern of the
transmitter shall fall entirely within the unshaded portion of the transmitter output compliance mask shown
in
output pins of the device and the device is driving a 100-Ω ± 5% differential resistive load. The output eye
pattern of an LP-Serial transmitter that implements pre-emphasis (to equalize the link and reduce
80
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Figure
54. This figure should be used with the parameters specified in
Parameter
Parameter
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
Table 57. Long Run Transmitter AC Timing Specifications—3.125 GBaud
Table 56. Long Run Transmitter AC Timing Specifications—2.5 GBaud
V
V
J
J
S
UI
D
T
O
DIFFPP
MO
Symbol
V
V
J
J
S
UI
D
T
O
DIFFPP
MO
Symbol
–0.40
800
400
–0.40
800
320
Min
—
—
—
Min
—
—
—
Range
Range
2.30
1600
0.17
0.35
1000
400
2.30
1600
0.35
1000
320
0.17
Max
Max
Volts
mV p-p
UI p-p
UI p-p
ps
ps
Unit
Volts
mV p-p
UI p-p
UI p-p
ps
ps
Unit
Table 58
Voltage relative to COMMON of
either signal comprising a
differential pair
Skew at the transmitter output
between lanes of a multilane link
± 100 ppm
Voltage relative to COMMON
of either signal comprising a
differential pair
Skew at the transmitter output
between lanes of a multilane
link
± 100 ppm
when measured at the
Freescale Semiconductor
Notes
Notes
—
—
—
—
—
—