PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 121

• Manufacturer Part Number: PEF20550HV2.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF20550HV2.1XT

• Lead Free Status / Rohs Status: Compliant

SACCO
Group
SACCO-
FIFO
SACCO-
status/
control
SACCO-
transmit
addr.
SACCO-
address
recognition
Semiconductor Group
Reg
Name
RFIFO
XFIFO
ISTA_A/B
MASK_A/B
EXIR_A/B CSS
CMDR
MODE
CCR1
CCR2
RLCR
STAR
RSTA
RHCR
XAD1
XAD2
RAL1
RAL2
RAH1
RAH2
Chip
Select
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
CSS
Access
RD
WR
RD
WR
RD
WR
RD/WR
RD/WR
RD/WR
WR
RD
RD
WR
WR
WR
RD/WR
WR
WR
WR
Address
mux
00
3E
00
3E
40
40
48
42
44
5E
58
5C
42
4E
52
48
4A
50
52
4C
4E
:
:
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
80
80
C0
C0
C8
C2
C4
D8
C2
D2
C8
D0
D2
BE
BE
DE
CE
CA
CE
DC
CC
:
:
121
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Address
demux
00
1F
00
1F
20
20
24
21
22
2F
2C
2E
21
27
29
24
25
28
29
26
27
:
:
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
40
40
60
60
64
61
62
61
67
69
64
65
68
69
66
67
5F
5F
6F
6E
6C
:
:
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Reset
Value
xx
xx
xx
xx
00
00
00
00
00
00
00
xx
48
xx
xx
xx
xx
xx
xx
xx
xx
Detailed Register Description
:
:
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Comment
receive FIFO
transmit FIFO
interrupt status reg.
channel A/B
mask reg. channel
A/B
extended interrupt
channel A/B
command reg.
mode reg.
channel
configuration reg. 1
channel
configuration reg. 2
receive frame
length check
status reg.
receive status reg.
receive HDLC-
control byte
transmit address 1
transmit address 2
receive address
low 1
receive address
low 2
receive address
high 1
receive address
high 2
PEB 20550
PEF 20550
Refer
to page
163
164
165
166
166
170
171
173
174
175
176
178
179
180
180
181
168
178
179
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