PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 222
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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PEB 20550
PEF 20550
Application Hints
FC Mode 3
FC mode 3 can be used for IOM-2 applications, but it should be noted that some IOM-2
layer-1 transceivers will interpret an FSC pulse of only one DCL period as a superframe
marker (e.g. SBCX PEB 2081, IEC-Q PEB 2091, … ), and it is not allowed to provide a
superframe marker in every frame. For these applications it is recommended to use
either FC mode 6 or FC mode 7.
FC Mode 4
FC mode 4 applies for special SLD applications like 2 ISAC-S devices connected to one
SIP line. Usually each SIP line carries the two 64 kBit/s B channels followed by a feature
control and a signaling channel. The feature control and signaling channels however are
not required for all applications. This is, for example, the case if a digital subscriber circuit
(S- or U- layer-1 transceiver) is connected via an ISDN Communication Controller
(ICC PEB 2070) to the ELIC. The task of the ICC is to handle the D-channel and to
switch the B1 and B2 channels from the SLD to the IOM-1 interface. The capacity of such
an SLD line card can be doubled if the unused timeslots for the feature control and
signaling channels are also used as 64 kBit/s B channels. This is possible if the
additionally connected ICC (or ISAC-S) is synchronized with an FSC that is delayed by
2 timeslots i.e. the rising FSC edge is at the beginning of timeslot 2 instead of 0. The CFI
timeslots 2, 3, 6 and 7 can then be programmed as normal B channels within the ELIC
instead of being programmed as feature control and signaling channels.
FC Mode 6
This is the most often used type of FSC signal, because it covers the standard IOM-1,
IOM-2 and SLD applications. The rising edge of FSC marks timeslot 0, bit 7 of the CFI
frame.
The pulse width is 32 bits or 4 timeslots, i.e. the FSC is symmetrical (duty cycle 1:1) if
the CFI frame consists of 8 timeslots (SLD), and the FSC is high during the first IOM-2
channel if the CFI frame consists of 32 timeslots (IOM-2).
Semiconductor Group
222
01.96
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