PEF20550HV2.1XT Infineon Technologies, PEF20550HV2.1XT Datasheet - Page 204
PEF20550HV2.1XT
Manufacturer Part Number
PEF20550HV2.1XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEF20550HV2.1XT.pdf
(407 pages)
Specifications of PEF20550HV2.1XT
Lead Free Status / Rohs Status
Compliant
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programmed to the offset registers (OFD, OFU) given the desired bit number (BND,
BNU) to be marked. BPF denotes the actual number of bits constituting a frame.
Table 27
Formulas to Calculate the PCM Frame Offset Downstream (RxD#)
PCM Mode Offset Downstream, POFD, PCSR
0
1, 3
2
Figure 61
PCM Interface Framing for PMOD:PSM = 1
The formulas given in table 27 and table 28 apply for calculating the values to be
Semiconductor Group
PFS
PDC
TxD#
TxD#
RxD#
RxD#
TxD#
TxD#
RxD#
RxD#
OFD9 … 2 = (BND – 17 + BPF)
OFD9 … 1 = (BND – 33 + BPF)
OFD9 … 0 = (BND – 65 + BPF)
1st Bit
1st Bit
1st Bit
1st Bit
1st Bit
2nd Bit
2nd Bit
1st Bit
1st Bit
2nd Bit 3rd Bit
2nd Bit
1st Bit
3rd Bit
3rd Bit
2nd Bit
3rd Bit
2nd Bit
2nd Bit
...
...
2nd Bit
...
...
...
...
3rd Bit
...
...
3rd Bit
3rd Bit
204
3rd Bit
mod BPF
mod BPF
mod BPF
...
...
...
Remarks
PCSR:OFD1 … 0 = 0
PCSR:OFD0 = 0
–
Conditions:
PMOD
PMOD PCR = 0,
PMOD :
PMOD :
PMOD :
PMOD :
PMOD
PMOD
PMOD
:
:
:
:
:
Application Hints
PSM
PCR
PCR = 0,
PCR
PCR
PCR = 1,
PCR
PCR = 1,
=
=
=
=
=
0,
0,
1
1,
1,
PEB 20550
PEF 20550
PCSR :
PCSR
PCSR
PCSR
PCSR
PCSR :
PCSR :
PCSR :
:
:
:
:
URE
URE = 0
DRE
DRE = 1
URE = 1
URE
DRE = 0
DRE
ITT08040
01.96
1 =
=
=
=
0
0
1
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