EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 138
![IC EZ80 ACCLAIM 50MHZ 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80190AZ050SC00TR
Manufacturer Part Number
EZ80190AZ050SC00TR
Description
IC EZ80 ACCLAIM 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050SC00TR
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Manufacturer
Quantity
Price
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PS006614-1208
Table 60. MACC x DATA Starting Address Register
MACC
Table 61. MACC x DATA Ending Address Register
MACC
Table 62. MACC x DATA Reload Address Register
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
MACC_xSTART
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
MACC_xEND
Bit
Reset
CPU Access
Note: R/W = Read/Write.
The MACC
to read 16-bit values from the x DATA for performing its calculations.
The MACC_xRELOAD register, listed in
data of MACC RAM. When the x data address increments to the value in the
MACC_xEND register, the next x data address is taken from this MACC_xRELOAD reg-
ister.
x
x
DATA Ending Address Register
DATA Reload Address Register
Value Description
00h–
FFh
Value Description
00h–
FFh
_
xEND register, listed in
R/W
R/W
R/W
The starting address for MACC RAM x DATA.
The ending address for MACC RAM x DATA.
0
7
0
7
0
R/W
R/W
R/W
0
6
0
6
0
R/W
R/W
R/W
0
5
0
5
0
Table
Table
R/W
R/W
R/W
61, defines the ending address for the MACC
0
4
0
4
0
62, defines the reload address within the x
(MACC_xSTART = E0h) (Continued)
R/W
R/W
R/W
0
3
0
3
0
(MACC_xRELOAD = E2h)
(MACC_xEND = E1h)
R/W
R/W
R/W
0
2
0
2
0
Product Specification
R/W
R/W
R/W
0
1
0
1
0
Multiply-Accumulator
R/W
R/W
R/W
0
0
0
0
0
eZ80190
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