EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 72
![IC EZ80 ACCLAIM 50MHZ 100LQFP](/photos/6/76/67664/269-100-lqfp_sml.jpg)
EZ80190AZ050SC00TR
Manufacturer Part Number
EZ80190AZ050SC00TR
Description
IC EZ80 ACCLAIM 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050SC00TR
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Universal Zilog Interface
PS006614-1208
The eZ80190 device features two on-chip Universal Zilog Interface (UZI) devices. Each
UZI contains three serial communication controller blocks: a Serial Peripheral Interface
(SPI), a Universal Asynchronous Receiver/Transmitter (UART), and an Inter-Integrated
Circuit serial bus (I
trollers can be enabled. The UZI devices are connected to GPIO pins on Port C (UZI 1)
and Port D (UZI 0). Ports C and D must be configured for alternate-function I/O to allow
the UZI devices to communicate via the Port C and D pins. Each UZI also contains control
registers and a Baud Rate Generator (BRG) that generates a lower-frequency clock for the
SPI and UART devices. The I
block, including the Baud Rate Generator, is inactive when none of the serial devices are
selected.
See
on page 67, and
Serial Peripheral Interface
Figure 11
I2C Serial I/O Interface
2
displays the UZI block diagram.
C). For each UZI device, any one of these three communication con-
I
2
Interrupt
C
UZI
GPIO Port C (UZI1) or Port D (UZIO)
2
C block features its own clock generator. The entire UZI
on page 84,
To eZ80
UZI Interface
Figure 11. UZI Block Diagram
SPI
on page 92 chapters for detailed operating infor-
®
CPU
Universal Asynchronous Receiver/Transmitter
Data
Address
I/O
UART
Baud Rate
Generator
Clock
Product Specification
Universal Zilog Interface
Universal
Interface
Zilog
Alternate
Function
Enable
GPIO
eZ80190
62
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