EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 96

• Manufacturer Part Number: EZ80190AZ050SC00TR
• Description: IC EZ80 ACCLAIM 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 38. SPI Clock Phase and Clock Polarity Operation
SPI Functional Description
PS006614-1208
0
0
1
1
(CPHA bit = 0) Data Out
(CPHA bit = 1) Data Out
CPHA
Sample Input
Sample Input
SCK (CPOL bit = 0)
SCK (CPLO bit = 1)
SS (To Slave)
0
1
0
1
master and slave must operate with the same timing. The master device always places data
on the MOSI line a half-cycle before the clock edge (SCK signal), for the slave device to
latch the data.
Figure 15
When a master device transmits to a slave device via the MOSI signal, the slave device
CPOL
on page 87 displays a block diagram of the serial peripheral interface circuitry.
MSB
Falling
Rising
Rising
Falling
Transmit
MSB
Edge
SCK
1
6
6
2
Rising
Falling
Falling
Rising
Receive
5
Edge
Figure 14. SPI Timing
SCK
Number of Cycles on the SCK Signal
5
3
4
High
High
Low
Low
4
4
Idle State
SCK
3
3
5
2
Yes
Yes
No
No
Characters?
2
Between
6
SS High
Product Specification
1
Serial Peripheral Interface
1
7
LSB
8
LSB
eZ80190
86