EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 32

• Manufacturer Part Number: EZ80190AZ050SC00TR
• Description: IC EZ80 ACCLAIM 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 1. 100-Pin LQFP Pin Identification of the eZ80190 Device (Continued)
PS006614-1208
Pin
No.
95
96
97
98
99
100
Symbol
PA6
PA7
V
GND
BUSREQ Bus Request
PHI
DD
Function
GPIO Port A
GPIO Port A
Power Supply
Ground
System Clock
Signal Direction
Input/Output
Input/Output
Input, Active Low
Output
Description
The PA6 pin can be used for GPIO. It can be
individually programmed as an input or an output
and can also be used individually as an interrupt
input. Each Port A pin, when programmed as an
output, can be selected to be an open-drain or
open-source output.
The PA7 pin can be used for GPIO. It can be
individually programmed as an input or an output
and can also be used individually as an interrupt
input. Each Port A pin, when programmed as an
output, can be selected to be an open-drain or
open-source output.
Power Supply
Ground
External devices can force the eZ80190 device to
release the bus for their use by driving this line
Low. To the CPU, the bus request signal can also
originate from internal DMA controllers. In such
cases, bus requests from the DMA controllers
have a higher priority than a request from an
external bus master.
The PHI pin is an output driven by the internal
system clock. It can be used by the system for
synchronization with the eZ80190 device.
Product Specification
Architectural Overview
22