EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 165

• Manufacturer Part Number: EZ80190AZ050SC00TR
• Description: IC EZ80 ACCLAIM 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 82. ZDI Read Only Registers
ZDI Register Definitions
PS006614-1208
ZDI Address
00h
01h
02h
03h
10h
11h
12h
20h
Note:
ZDI Address Match Registers
The four sets of address match registers are used for setting the addresses for generating
break points. When the accompanying BRK_ADDRX bit is set in the ZDI Break Control
register to enable the particular address match, the current eZ80190 device address is com-
pared with the 3-byte address set, {ZDI_ADDRx_U, ZDI_ADDRx_H,
ZDI_ADDR_x_L}. If the CPU is operating in ADL mode, the address is provided by
ADDR[23:0]. If the CPU is operating in Z80
{MBASE[7:0], ADDR[15:0]}. If a match is found, ZDI issues a break to the eZ80190
device placing the processor in ZDI mode pending further instructions from the ZDI inter-
face block. If the address is not the first op-code fetch, the ZDI break is executed at the end
of the instruction in which it is executed. There are four sets of address match registers.
They can be used in conjunction with each other to break on branching instructions.
Due to pipelining functions within the CPU, if the ZDI match address is placed 1 or 2
bytes after completion of a repeating instruction (such as LDIR), the break is issued fol-
lowing completion of only a single cycle of the repeat. When execution is resumed, the
repeating instruction completes as required.
ZDI Register Name
ZDI_ID_L
ZDI_ID_H
ZDI_ID_REV
ZDI_STAT
ZDI_RD_L
ZDI_RD_H
ZDI_RD_U
ZDI_RD_MEM
ZDI Register Function
eZ80
eZ80 Product ID High Byte register
eZ80 Product ID Revision register
Status register
Read Memory Address Low Byte
register
Read Memory Address High Byte
register
Read Memory Address Upper Byte
register
Read Memory Data Value
®
Product ID Low Byte register
®
mode, the address is provided by
Product Specification
Reset
Value
05h
00h
XXh
00h
XXh
XXh
XXh
XXh
Zilog Debug Interface
eZ80190
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