EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 89

IC EZ80 ACCLAIM 50MHZ 100LQFP

EZ80190AZ050SC00TR

Manufacturer Part Number
EZ80190AZ050SC00TR
Description
IC EZ80 ACCLAIM 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80190AZ050SC00TR

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80190AZ050SC00TR
Manufacturer:
Zilog
Quantity:
10 000
PS006614-1208
UART Line Status Registers
Table 35. UART Line Status Registers
Bit
Position
[7:5]
4
LOOP
3
OUT2
2
OUT1
1
RTS
0
DTR
Bit
Reset
CPU Access
Note: R = Read Only.
These registers are used to show the status of UART interrupts and registers.
Value
000b
0
1
0–1
0–1
0–1
0–1
Description
Reserved—must be 000b.
LOOP-BACK is not enabled.
LOOP-BACK is enabled. The UART operates in internal
LOOP-BACK mode. The transmit data output port is
disconnected from the internal transmit data output and set to
1. The receive data input port is disconnected and internal
receive data is connected to internal transmit data. The modem
status input ports are disconnected and the four bits of the
modem control register are connected as modem status inputs.
The two modem control output ports (OUT1 & OUT2) are set to
their inactive state.
This bit does not function under normal operation. In LOOP-
BACK mode, this bit is connected to the DCD bit in the UART
Modem Status Register.
This bit does not function under normal operation. In LOOP-
BACK mode, this bit is connected to the RI bit in the UART
Modem Status Register.
Request to Send
Under normal operation, the RTS output port is the inverse of
this bit. In LOOP-BACK mode, this bit is connected to the CTS
bit in the UART Modem Status Register.
Data Terminal Ready
Under normal operation, the DTR output port is the inverse of
this bit. In LOOP-BACK mode, this bit is connected to the DSR
bit in the UART Modem Status Register.
R
7
0
R
6
1
R
5
1
(UART0_LSR = C5h, UART1_LSR = D5h)
R
4
0
Universal Asynchronous Receiver/Transmitter
R
3
0
R
2
0
Product Specification
R
1
0
R
0
0
eZ80190
79

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