EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 172

IC EZ80 ACCLAIM 50MHZ 100LQFP

EZ80190AZ050SC00TR

Manufacturer Part Number
EZ80190AZ050SC00TR
Description
IC EZ80 ACCLAIM 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet

Specifications of EZ80190AZ050SC00TR

Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80190AZ050SC00TR
Manufacturer:
Zilog
Quantity:
10 000
PS006614-1208
ZDI Write Memory Register
Table 88. ZDI Write Memory Register (ZDI_WR_MEM = 30h in the ZDI Register Write Only
eZ80
Bit
Position
[7:0]
ZDI_IS4,
ZDI_IS3,
ZDI_IS2,
ZDI_IS1,
or ZDI_IS0
Bit
Reset
CPU Access
Note: X = Undefined; W = Write.
Bit
Position
[7:0]
ZDI_WR_MEM
®
A write to the ZDI Write Memory register, listed in
to write the 8-bit data to the memory location specified by the current address in the pro-
gram counter. In Z80
MEMORY mode, this address is PC[23:0]. The program counter, PC, increments after
each data write. However, the ZDI register address does not increment automatically when
this register is accessed. As a result, the ZDI master is allowed to write any number of data
bytes by writing to this address one time, and then writing any number of data bytes.
The Product ID Low and High Byte registers, listed in
provide a means for an external device to determine the particular Product product being
addressed. For the eZ80190 device, these two bytes {ZDI_ID_H, ZDI_ID_L}, return the
value {
Product ID Low Byte Register
00h
Value Description
00h–
FFh
,
05h
Value Description
00h–
FFh
}.
The 8-bit data that is transferred to the ZDI slave following a
write to this address is written to the address indicated by the
current program counter. The program counter is incremented
following each 8-bits of data. In Z80 MEMORY mode, ({MBASE,
PC[15:0]})
mode, (PC[23:0])
W
X
7
®
These registers contain the Op Codes and operands for
immediate execution by the CPU following a write to
ZDI_IS0. The ZDI_IS0 register contains the first Op Code
of the instruction. The remaining ZDI_ISx registers contain
any additional Op Codes or operand dates required for
execution of the required instruction.
MEMORY mode, this address is {MBASE, PC[15:0]}. In ADL
W
X
6
8 bits of transferred data. In ADL MEMORY
Address Space)
W
X
5
8-bits of transferred data.
W
X
4
Table
W
X
3
Table 89
88, causes the eZ80190 device
W
X
2
on page 163, combine to
Product Specification
W
X
1
Zilog Debug Interface
W
X
0
eZ80190
162

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