EZ80190AZ050SC00TR Zilog, EZ80190AZ050SC00TR Datasheet - Page 200

• Manufacturer Part Number: EZ80190AZ050SC00TR
• Description: IC EZ80 ACCLAIM 50MHZ 100LQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050SC00TR

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PS006614-1208
Table 118. External I/O Write Timing
Wait State Timing for Read Operations
Parameter
T
T
T
T
T
T
T
T
T
T
* At the conclusion of a write cycle, deassertion of WR always occurs before any change to ADDR,
1
2
3
4
5
6
7
8
9
10
DATA, CSx, or IORQ.
Figure 44
WAIT state for a read operation. The WAIT signal is not delivered to a pin on the eZ80190
device. It is displayed here for informational purposes only.
Description
Clock Rise to ADDR Valid Delay
Clock Rise to ADDR Hold Time
Clock Rise to Output DATA Valid Delay
DATA Hold Time from Clock Rise
Clock Rise to CSx Assertion Delay
Clock Rise to CSx Deassertion Delay
Clock Rise to IORQ Assertion Delay
Clock Rise to IORQ Deassertion Delay
Clock Fall to WR Assertion Delay
Clock Rise to WR Deassertion Delay*
on page 191 displays the extension of the memory access signals using a single
Min
1.6
5.0
3.0
3.0
2.1
4.1
1.5
1.4
Product Specification
—
—
Delay (ns)
Electrical Characteristics
Max
10.2
10.2
10.5
10.3
9.7
7.9
3.9
4.1
—
—
190