AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 1029

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

33.7.31
Name:
Access Type:
Offset:
Reset Value:
• WPVSRC: Write Protect Violation Source
• WPHWSx: Write Protect HW Status
• WPVS: Write Protect Violation Status
• WPSWSx: Write Protect SW Status
Note:
32117C–AVR-08/11
WPVS
31
23
15
7
-
When WPVS is active, this field indicates the write-protected register (through address offset divided by four) in which a write
access has been attempted.
0: The Write Protect HW x of the register group x is disabled.
1: The Write Protect HW x of the register group x is enabled.
0: No Write Protect violation has occurred since the last read of the WPSR register.
1: At least one Write Protect violation has occurred since the last read of the WPSR register. If this violation is an unauthorized
attempt to write a protected register, the associated violation is reported into WPVSRC field.
0: The Write Protect SW x of the register group x is disabled.
1: The Write Protect SW x of the register group x is enabled.
Reading WPSR automatically clears WPVS and WPVSRC fields.
Write Protect Status Register
30
22
14
6
-
-
WPSR
Read-only
0x0E8
0x00000000
WPHWS5
WPSWS5
29
21
13
5
WPHWS4
WPSWS4
28
20
12
4
WPVSRC
WPVSRC
WPHWS3
WPSWS3
27
19
11
3
WPHWS2
WPSWS2
26
18
10
2
WPHWS1
WPSWS1
25
17
9
1
AT32UC3C
WPHWS0
WPSWS0
24
16
8
0
1029