AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 1098

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

35.7
32117C–AVR-08/11
Module configuration
The specific configuration for each ACIFA instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks according to the table in the Sys-
tem Bus Clock Connections section.
Table 35-2.
Table 35-3.
The following table gives which ACIFA module controls the analog comparators.
Table 35-4.
The inputs of the AC are configured through the CONFA and CONFB registers. The configura-
tion allows to select pin or internal voltage from the DACs.
The following table defines the valid settings for the CONFA and CONFB registers for each
ACIFA instance. This setting defines the mapping of the AC input voltage.
Table 35-5.
Module name
ACIFA0
ACIFA1
Register
VERSION
Module name
ACIFA0
ACIFA1
CONFA[INSELP]
0
1
2
Module clock name
Register Reset Values
Analog comparators controlled by ACIFA
v
ip
of AC0A selection
Clock name
CLK_ACIFA0
CLK_ACIFA1
Reset Value
0x00000100
Name
AC0AP0
AC0AP1
DAC0_int
Analog comparator name
AC0A and AC0B
AC1A and AC1B
Description
Peripheral Bus clock from the PBA clock domain
Peripheral Bus clock from the PBA clock domain
Connection
See Peripheral Multiplexing on I/O line
chapter
Internal output of the DAC0
AT32UC3C
1098