AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 499

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AT32UC3C2256C

Manufacturer Part Number
AT32UC3C2256C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT32UC3C2256C

Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
68
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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24.5.14
24.5.15
32117C–AVR-08/11
VLAN Support
Wake-on LAN Support
An Ethernet encoded 802.1Q VLAN tag looks like this:
Table 24-4.
The VLAN tag is inserted at the 13
the VID (VLAN identifier) is null (0x000), this indicates a priority-tagged frame. The MAC can
support frame lengths up to 1536 bytes, 18 bytes more than the original Ethernet maximum
frame length of 1518 bytes. This is achieved by setting bit 8 in the network configuration register.
The following bits in the receive buffer descriptor status word give information about VLAN
tagged frames:
The receive module supports wake-on LAN by detecting the following events on incoming
receive frames:
If one of these events occurs wake-on LAN detection is indicated by asserting WOL output pin
for 64 RX_CLK cycles. These events can be individually enabled by bits MAG, ARP, SA1 & MTI
in wake-on LAN register (WOL). Also, for wake-on LAN detection to occur, receive enable must
be set in the network control register (NCR), however a receive buffer does not have to be
available.
WOL assertion due to ARP request, specific address 1 or multicast filter events will occur even if
the frame is errored. For magic packet event, the frame must be correctly formed and error free.
A magic packet event is detected if all of the following are true:
An ARP packet event is detected if all of the following are true:
• Bit 21 set if receive frame is VLAN tagged (i.e. type id of 0x8100)
• Bit 20 set if receive frame is priority tagged (i.e. type id of 0x8100 and null VID). (If bit 20 is
• Bit 19, 18 and 17 set to priority if bit 21 is set
• Bit 16 set to CFI if bit 21 is set
• Magic packet
• ARP request to the device IP address
• Specific address 1 filter match
• Multicast hash filter match
• magic packet events are enabled by WOL.MAG bit
• the frame’s destination address matches specific address 1
• the frame is correctly formed with no errors
• the frame contains at least 6 bytes of 0xFF for synchronization
• there are 16 repetitions of the contents of specific address 1 register immediately following
• ARP request are enabled by WOL.ARP bit
• broadcasts are allowed by NCFG.CAF
set bit 21 is set also.)
the synchronization
TPID (Tag Protocol Identifier) 16 bits
802.1Q VLAN Tag
0x8100
th
byte of the frame, adding an extra four bytes to the frame. If
First 3 bits priority, then CFI bit, last 12 bits VID
TCI (Tag Control Information) 16 bits
AT32UC3C
499

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