AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 415

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.7
Table 21-1.
1.
Note:
32117C–AVR-08/11
0x30-3C
Offset
0x0C
0x1C
0x2C
0x4C
0x5C
0x6C
0x7C
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0x40
0x44
0x48
0x50
0x54
0x58
0x60
0x64
0x68
0x70
0x74
0x78
User interface
The reset values for these registers are device specific. Please refer to the Module Configuration section at the end of this
chapter.
The number of DMA channels is device-specific. Not all devices will implement all four channels. These devices will not imple-
ment all user interface registers. Unimplemented registers will always read as 0.
MDMA Register Memory Map
Current Descriptor Address Register 0
Current Descriptor Address Register 1
Current Descriptor Address Register 2
Current Descriptor Address Register 3
Channel Control Register 0
Channel Control Register 1
Channel Control Register 2
Channel Control Register 3
Descriptor Start Address 0
Descriptor Start Address 1
Descriptor Start Address 2
Descriptor Start Address 3
Interrupt Disable Register
Interrupt Enable Register
Read Address Register 0
Write Address Register 0
Read Address Register 1
Write Address Register 1
Read Address Register 2
Write Address Register 2
Read Address Register 3
Write Address Register 3
Interrupt Status Register
Interrupt Mask Register
Interrupt Clear Register
Parameter Register
Version Register
Control Register
RESERVED
Register
Register Name
DSAR0
DSAR1
DSAR2
DSAR3
CDAR0
CDAR1
CDAR2
CDAR3
WAR0
WAR1
WAR2
WAR3
CCR0
CCR1
CCR2
CCR3
RAR0
RAR1
RAR2
RAR3
IMR
IER
IDR
ISR
ICR
CR
PR
VR
-
Channel
0
1
2
3
0
0
0
0
1
1
1
1
2
2
2
2
3
3
3
3
-
-
-
-
-
-
-
-
-
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read-only
Read-only
Write-only
Write-only
Write-only
Read-only
Read-only
Read-only
Access
AT32UC3C
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
-
-
(1)
(1)
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