AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 901

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32.6.3.16
32117C–AVR-08/11
Interrupts
• Global interrupts
• Pipe interrupts
A CRC error can occur during the IN stage if the USBC detects a corrupted packet. The IN
packet will remain stored in the bank and RXINI will be set.
The user can check the Pn_CTR_STA_BK0/1.CRCERR bit in the pipe descriptor to see which
current bank has been affected.
There are two kinds of host interrupts: processing, i.e. their generation is part of the normal pro-
cessing, and exception, i.e. errors not related to CPU exceptions.
The processing host global interrupts are:
There is no exception host global interrupt.
The processing host pipe interrupts are:
The exception host pipe interrupts are:
• The Device Connection Interrupt (DCONNI)
• The Device Disconnection Interrupt (DDISCI)
• The USB Reset Sent Interrupt (RSTI)
• The Downstream Resume Sent Interrupt (RSMEDI)
• The Upstream Resume Received Interrupt (RXRSMI)
• The Host Start of Frame Interrupt (HSOFI)
• The Host Wakeup Interrupt (HWUPI)
• The Pipe n Interrupt (PnINT)
• The Received IN Data Interrupt (RXINI)
• The Transmitted OUT Data Interrupt (TXOUTI)
• The Transmitted SETUP Interrupt (TXSTPI)
• The Number of Busy Banks (NBUSYBK) interrupt
• The Errorflow Interrupt (ERRORFI)
• The Pipe Error Interrupt (PERRI)
• The NAKed Interrupt (NAKEDI)
• The Received STALLed Interrupt (RXSTALLDI)
• The CRC Error Interrupt (CRCERRI)
AT32UC3C
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