AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 919

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32.7.2
32.7.2.1
Register Name:
Access Type:
Offset:
Reset Value:
• GNAK: Global NAK
• LS: low-speed mode force
• RMWKUP: Remote wakeup
• DETACH: Detach
• ADDEN: Address Enable
• UADD: USB Address
32117C–AVR-08/11
ADDEN
31
23
15
7
-
-
-
0: Normal mode.
1: A NAK handshake is answered for each USB transaction regardless of the current endpoint memory bank status.
0: The full-speed mode is active.
1: The low-speed mode is active.
This bit can be written to even if USBE is zero or FRZCLK is one. Disabling the USBC (by writing a zero to the USBE bit) does
not reset this bit.
Writing a zero to this bit has no effect.
Writing a one to this bit will send an upstream resume to the host for a remote wakeup.
This bit is cleared when the USBC receives a USB reset or once the upstream resume has been sent.
Writing a zero to this bit will reconnect the device.
Writing a one to this bit will physically detach the device (disconnect internal pull-up resistor from DP and DM).
Writing a zero to this bit has no effect.
Writing a one to this bit will activate the UADD field (USB address).
This bit is cleared when a USB reset is received.
This field contains the device address.
This field is cleared when a USB reset is received.
USB Device Registers
Device General Control Register
30
22
14
6
-
-
-
UDCON
Read/Write
0x0000
0x00000100
29
21
13
5
-
-
-
LS
28
20
12
4
-
-
UADD
27
19
11
3
-
-
-
26
18
10
2
-
-
-
RMWKUP
GNAK
25
17
9
1
-
AT32UC3C
DETACH
24
16
8
0
-
-
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