AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 118

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AT86RF212

Manufacturer Part Number
AT86RF212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT86RF212

Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120

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7.7.2 Integrated Oscillator Setup
118
AT86RF212
Using the internal oscillator, the oscillation frequency depends on the load capacitance
between the crystal pins XTAL1 and XTAL2. The total load capacitance C
equal to the specified load capacitance of the crystal itself. It consists of the external
capacitors CX and parasitic capacitances connected to the XTAL nodes. Figure 7-15
shows parasitic capacitances, such as PCB stray capacitances.
Figure 7-15. Simplified XOSC Schematic with External Components
Additional internal trimming capacitors C
0 pF to 4.5 pF with 0.3 pF resolution are selectable using the bits XTAL_TRIM of
register 0x12 (XOSC_CTRL). To calculate the total load capacitance, the following
formula can be used while C
2-2.
The trimming capacitors provide the possibility of reducing frequency deviations caused
by production process variations or by external components tolerances. Note that the
oscillation frequency can only be reduced by increasing the trimming capacitance. The
frequency deviation caused by one step of C
capacitor values.
An amplitude control circuit is included to ensure stable operation under different
operating conditions and for different crystal types. Enabling the crystal oscillator in
P_ON state and after leaving SLEEP state causes a slightly higher current during the
amplitude build-up phase to guarantee a short start-up time. At stable operation, the
current is reduced to the amount necessary for a robust operation. This also keeps the
drive level of the crystal low.
Generally, crystals with a higher load capacitance are less sensitive to parasitic pulling
effects caused by external component variations or by variations of board and circuit
parasitics. On the other hand, a larger crystal load capacitance results in a longer start-
up time and a higher steady state current consumption.
EVDD
XTAL_TRIM[3:0]
V
C
DD
L
C
= 0.5 · (CX + C
TRIM
XTAL1
C
PCB
TRIM
CX
EVDD
PAR
16MHz
+ C
represents the pin input capacitance defined in Table
PAR
+ C
TRIM
PCB
TRIM
)
XTAL2
CX
XTAL_TRIM[3:0]
are available. Values in the range from
decreases with increasing crystal load
AT86RF212
C
TRIM
C
PCB
PCB
8168C-MCU Wireless-02/10
L
must be

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