AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 20

• Manufacturer Part Number: AT86RF212
• Manufacturer: Atmel Corporation

Specifications of AT86RF212

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

Figure 4-12. Packet Structure – SRAM Write Access
Figure 4-13. Exemplary SPI Sequence – SRAM Read Access of a 5-byte Data Package
Figure 4-14. Exemplary SPI Sequence – SRAM Write Access of a 5-byte Data Package
4.4 PHY Status Information
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AT86RF212
As long as /SEL = L, every subsequent byte read or byte write increments the address
counter of the Frame Buffer until the SRAM access is terminated by /SEL = H.
Figure 4-13 and Figure 4-14 illustrate an exemplary SPI sequence of a SRAM access to
read and write a data package of 5-byte length, respectively.
Notes
• The SRAM access mode is not intended to be used as an alternative to the Frame
• Frame Buffer access violations are not indicated by a TRX_UR interrupt when using
Each SPI access can be configured to return status information of the radio transceiver
(PHY_STATUS) to the microcontroller using the first byte of the data transferred via MISO.
The content of the radio transceiver status information can be configured using register
bits SPI_CMD_MODE (register 0x04, TRX_CTRL_1). After reset, the content on the
first byte send on MISO to the microcontroller is set to 0x00.
Buffer access modes; refer to section 4.3.2.
the SRAM access mode; for further details refer to section 7.4.3.
8168C-MCU Wireless-02/10