AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 146

• Manufacturer Part Number: AT86RF212
• Manufacturer: Atmel Corporation

Specifications of AT86RF212

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

9.6 Frame Buffer Empty Indicator
9.6.1 Overview
Figure 9-9. Timing Diagram of Frame Buffer Empty Indicator
9.6.2 Register Description
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AT86RF212
For time critical applications, it may be desirable to read the frame data as early as
possible. To accomplish this, the Frame Buffer empty status can be indicated to the
microcontroller through a dedicated pin.
Pin 24 (IRQ) can be configured as Frame Buffer Empty Indicator during the Frame
Buffer read access. This mode is enabled by register bit RX_BL_CTRL (register 0x04,
TRX_CTRL_1).
As shown in Figure 9-9, the pin 24 turns from IRQ into Frame Buffer Empty Indicator
after the Frame Buffer read access command has been transferred on the SPI bus, see
(1) in Figure 9-9. The pin 24 turns back to its regular function IRQ when the Frame
Buffer read procedure has been completed by /SEL = H, see (4).
The microcontroller has to observe pin 24 during the Frame Buffer read procedure. A
Frame Buffer read access can proceed as long as pin 24 = L, see (2). Pin 24 = H
indicates that the Frame Buffer is currently not ready for another SPI cycle, see (3), and
thus the Frame Buffer read procedure has to wait for valid data accordingly.
The Frame Buffer Empty Indicator pin 24 (IRQ) becomes effective t
rising edge of last SCLK clock of the Frame Buffer read command byte.
After finishing the Frame Buffer read access by releasing /SEL = H, see (4), pending
interrupts are immediately indicated by pin IRQ.
If during the Frame Buffer read access a receive error occurs (e.g. a PLL unlock), the
Frame Buffer Empty Indicator locks on 'empty' (pin 24 = H) too. To prevent possible
deadlocks, the microcontroller should impose a timeout counter that checks whether the
Frame Buffer Empty Indicator remains logic high for more than 2 octet periods. A new
byte must have been arrived at the frame buffer during that period. If not, the Frame
Buffer read access should be aborted.
Register 0x04 (TRX_CTRL_1):
The TRX_CTRL_1 register is a multi purpose register to control various operating
modes and settings of the radio transceiver.
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8168C-MCU Wireless-02/10
= 750 ns after the