AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 89

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AT86RF212

Manufacturer Part Number
AT86RF212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT86RF212

Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120

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6.7.2 LBT Mode
6.7.3 Register Description
8168C-MCU Wireless-02/10
LBT Threshold
According to [5], the maximum LBT threshold for an IEEE 802.15.4 signal is
presumably -82 dBm, assuming a channel spacing of 1 MHz.
The AT86RF212 supports the previously described LBT specific listening mode when
operating in the Extended Operating Mode.
In particular, during TX_ARET (see section 5.2.4), the CSMA-CA algorithm can be
replaced by the LBT listening mode when setting register bit CSMA_LBT_MODE
(register
MAX_CSMA_RETRIES (register 0x2C, XAH_CTRL_0) as well as MIN_BE and
MAX_BE (register 0x2F, CSMA_BE) are ignored, implying that the listening mode will
sustain unless a clear channel has been found or the TX_ARET transaction will be
canceled. The latter can be achieved by setting TRX_CMD to either FORCE_PLL_ON
or FORCE_TRX_OFF (register 0x02, TRX_STATE). All other aspects of TX_ARET
remain unchanged, refer to section 5.2.4.
The LBT threshold can be configured in the same way as for CCA, i.e. via register bits
CCA_MODE (register 0x08, PHY_CC_CCA) and register bits CCA_ED_THRES
(register 0x09, CCA_THRES), refer to section 6.6.
Register 0x08 (PHY_CC_CCA):
This register is relevant for the measurement mode when using LBT, i.e. selecting
“energy above threshold” or “carrier sense” (CS) or combination of both.
Table 6-36. Register 0x08 (PHY_CC_CCA)
• Bit 7 – CCA_REQUEST
Not applicable for LBT, see section 6.6.6.
• Bit 6:5 – CCA_MODE
The CCA mode can be used in order to select the appropriate LBT measurement mode
by using register bits CCA_MODE, refer to section 6.6.
• Bit 4:0 – CHANNEL
Refer to section 7.8.6.
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
0x17,
7
CCA_REQUEST
W
0
3
CHANNEL[3]
R/W
0
XAH_CTRL_1).
6
CCA_MODE[1]
R/W
0
2
CHANNEL[2]
R/W
1
In
this
case,
5
CCA_MODE[0]
R/W
1
1
CHANNEL[1]
R/W
0
however,
AT86RF212
the
4
CHANNEL[4]
R/W
0
0
CHANNEL[0]
R/W
1
register
bits
89

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