AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 130

• Manufacturer Part Number: AT86RF212
• Manufacturer: Atmel Corporation

Specifications of AT86RF212

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

8 Radio Transceiver Usage
8.1 Frame Receive Procedure
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AT86RF212
This section describes basic procedures to receive and transmit frames using the
AT86RF212.
A frame reception comprises of two actions: The transceiver listens for, receives, and
demodulates the frame to the Frame Buffer and signals the reception to the
microcontroller. After or during that process, the microcontroller can read the available
frame data from the Frame Buffer via the SPI interface.
While being in state RX_ON or RX_AACK_ON, the radio transceiver searches for
incoming frames on the selected channel. Assuming the appropriate interrupts are
enabled, a detection of an IEEE 802.15.4-2006 compliant frame is indicated by interrupt
IRQ_2 (RX_START). When the frame reception is completed, interrupt IRQ_3
(TRX_END) is issued.
Different Frame Buffer read access scenarios are recommended for
• non-time-critical applications:
• time-critical applications:
For non-time-critical operations, it is recommended to wait for interrupt IRQ_3
(TRX_END) before starting a Frame Buffer read access. Figure 8-1 illustrates the frame
receive procedure using IRQ_3 (TRX_END).
Figure 8-1. Transactions between AT86RF212 and Microcontroller during Receive
Critical protocol timing could require starting the Frame Buffer read access after
interrupt IRQ_2 (RX_START). The first byte of the frame data can be read one octet
time period after the IRQ_2 (RX_START) interrupt. The microcontroller must ensure to
read slower than the frame is received. Otherwise, a Frame Buffer underrun occurs,
IRQ_6 (TRX_UR) is issued, and the frame data may be not valid. To avoid this, the
Frame Buffer read access can be controlled by using a Frame Buffer Empty Indicator,
refer to section 9.6.
Read IRQ status, pin 24 (IRQ) deasserted
Read IRQ status, pin 24 (IRQ) deasserted
Read frame data (Frame Buffer access)
IRQ issued (IRQ_2)
IRQ issued (IRQ_3)
read access starts after IRQ_3 (TRX_END)
read access starts after IRQ_2 (RX_START)
8168C-MCU Wireless-02/10