AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 144

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AT86RF212

Manufacturer Part Number
AT86RF212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT86RF212

Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120

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9.5 RX Frame Time Stamping
9.5.1 Overview
144
AT86RF212
Table 9-15. RF Front-End Control Pins
• Bit 6 – IRQ_2_EXT_EN
Refer to section 9.5.2.
• Bit 5 – TX_AUTO_CRC_ON
Refer to section 6.3.5.
• Bit 4 – RX_BL_CTRL
Refer to section 9.6.2.
• Bit 3:2 – SPI_CMD_MODE
Refer to section 4.4.1.
• Bit 1:0 – IRQ_MASK_MODE, IRQ_POLARITY
Refer to section 4.7.2.
To determine the exact timing of an incoming frame, e.g. for beaconing networks, the
reception of this frame can be signaled to the microcontroller via pin 10 (DIG2). The pin
turns from L to H after detection of a valid PHR. When enabled, DIG2 is set to DIG2 = H
at the same time as IRQ_2 (RX_START) occurs, even if IRQ_2 is disabled. The pin
remains high for the length of the frame receive procedure, see Figure 9-8.
This
TRX_CTRL_1). Pin 10 (DIG2) can be connected to a timer capture unit of the
microcontroller.
If this pin is not used for RX Frame Time Stamping, it can be configured for Antenna
Diversity, refer to section 9.3. Otherwise, this pin is internally connected to ground.
Note:
PA_EXT_EN
function
0
1
(1)
1. It is recommended to set PA_EXT_EN = 1 only in receive or transmit states to
reduce the power consumption or avoid leakage current of external RF switches or
other building blocks, especially during SLEEP state.
State
n/a
BUSY_TX
Other
is
enabled
Pin
DIG3
DIG4
DIG3
DIG4
DIG3
DIG4
with
register
Value
H
H
L
L
L
L
bit
Description
External RF front-end control disabled
External RF front-end control enabled
IRQ_2_EXT_EN
8168C-MCU Wireless-02/10
(register
0x04,

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