AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 148

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AT86RF212

Manufacturer Part Number
AT86RF212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT86RF212

Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120

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9.7.2 Register Description
9.8 Configurable Start-Of-Frame Delimiter (SFD)
9.8.1 Overview
148
AT86RF212
The Dynamic Frame Buffer Protection is enabled if register bit RX_SAFE_MODE
(register 0x0C, TRX_CTRL_2) is set and the transceiver state is RX_ON or
RX_AACK_ON.
Note that Dynamic Frame Buffer Protection only prevents write accesses from the air
interface and not from the SPI interface. A Frame Buffer or SRAM write access may still
modify the Frame Buffer content.
Register 0x0C (TRX_CTRL_2):
The TRX_CTRL_2 register is a multi purpose register to control various settings of the
radio transceiver.
Table 9-19. Register 0x0C (TRX_CTRL_2)
• Bit 7 – RX_SAFE_MODE
If this bit is set, Dynamic Frame Buffer Protection is enabled.
Table 9-20. Dynamic Frame Buffer Protection Mode
• Bit 6 – TRX_OFF_AVDD_EN
Refer to sections 5.1.4.3 and 7.5.4.
• Bit 5:0
Refer to section 7.1.5.
The SFD is a field indicating the end of the SHR and the start of the packet data. The
length of the SFD is 1 octet (8 symbols for BPSK and 2 symbols for O-QPSK). This
octet is used for byte synchronization only and is not included in the Frame Buffer.
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
Register Bit
RX_SAFE_MODE
Note:
1. Dynamic Frame Buffer Protection is deactivated automatically with the rising edge
of pin 23 (/SEL) of a Frame Buffer read access (see section 4.3.2) or radio
transceiver state change from RX_ON / RX_AACK_ON to another state.
7
RX_SAFE_MODE
R/W
0
3
BPSK_OQPSK
R/W
0
(1)
Value
0
1
6
TRX_OFF_AVDD_EN
R/W
0
2
SUB_MODE
R/W
0
Description
Disable Dynamic Frame Buffer protection
Enable Dynamic Frame Buffer protection
5
OQPSK_SCRAM_EN
R/W
1
1
OQPSK_DATA_RATE
R/W
0
8168C-MCU Wireless-02/10
4
OQPSK_SUB1_RC_EN
R/W
0
0
OQPSK_DATA_RATE
R/W
0

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