AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 7

• Manufacturer Part Number: AT86RF212
• Manufacturer: Atmel Corporation

Specifications of AT86RF212

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

2.2.1.3 Crystal Oscillator Pins
2.2.1.4 Analog Pin Summary
Table 2-2. Analog Pin Behavior – DC Values
2.2.2 Digital Pins
2.2.2.1 Driver Strength Settings
Table 2-3. Digital Output Driver Configuration
8168C-MCU Wireless-02/10
Pin
RFP/RFN
XTAL1/XTAL2
DVDD
AVDD
Pin
MISO, IRQ, DIG1, … , DIG4
CLKM
Values and Conditions
V
V
V
V
C
V
V
V
SLEEP, RESET, and TRX_OFF)
V
DC
DC
DC
DC
DC
DC
DC
DC
PAR
= 0.9 V (BUSY_TX)
= 20 mV (receive states)
= 0 mV (otherwise)
= 0.9 V at both pins
= 1.8 V (all states, except SLEEP)
= 0 mV (otherwise)
= 1.8 V (all states, except P_ON,
= 0 mV (otherwise)
= 3 pF
XTAL1, XTAL2
The pin XTAL1 is the input of the reference oscillator amplifier (XOSC), XTAL2 the
output. A detailed description of the crystal oscillator setup and the related
XTAL1/XTAL2 pin configuration can be found in section 7.7.
When using an external clock reference signal, XTAL1 shall be used as input pin. For
further details, refer to section 7.7.3.
The AT86RF212 provides a digital microcontroller interface. The interface comprises a
slave SPI (/SEL, SCLK, MOSI, and MISO) and additional control signals (CLKM, IRQ,
SLP_TR, /RST, and DIG2). The microcontroller interface is described in detail in section
4.
Additional digital output signals DIG1 … DIG4 are provided to control external blocks,
i.e. for Antenna Diversity RF switch control or as an RX/TX Indicator; see sections 9.3
and 9.4 respectively. After reset, these pins are connected to digital ground
(DIG1/DIG2) or analog ground (DIG3/DIG4).
The driver strength of all digital output pins (MISO, IRQ, DIG1, … , DIG4) and CLKM
pin can be configured using register 0x03 (TRX_CTRL_0); see Table 2-3.
The capacitive load should be as small as possible and not larger than 50 pF when
using the 2 mA minimum driver strength setting. Generally, the output driver strength
should be adjusted to the lowest possible value in order to keep the current
consumption and the emission of digital signal harmonics low.
Default Driver Strength
2 mA
4 mA
Comments
DC level at pins RFP/RFN for various transceiver states
AC-coupling is required if an antenna with a DC path to ground is used.
Serial capacitance and capacitance of each pin to ground must be
< 100 pF.
DC level at pins XTAL1/XTAL2 for various transceiver states
Parasitic capacitance (C
load capacitance to the crystal.
DC level at pin DVDD for various transceiver states
Supply pins (voltage regulator output) for the digital 1.8 V voltage domain.
The outputs shall be bypassed by 1 µF.
DC level at pin AVDD for various transceiver states
Supply pin (voltage regulator output) for the analog 1.8 V voltage domain.
The outputs shall be bypassed by 1 µF.
Comment
Adjustable to 2 mA, 4 mA, 6 mA, and 8 mA
Adjustable to 2 mA, 4 mA, 6 mA, and 8 mA
PAR
) of the pins must be considered as additional
AT86RF212
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