AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 143

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AT86RF212

Manufacturer Part Number
AT86RF212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT86RF212

Max. Operating Frequency
0 MHz
Crypto Engine
AES
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120

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Figure 9-7. TX Power Ramping Control of RF Front-End for 250 kbit/s O-QPSK mode
9.4.3 Register Description
8168C-MCU Wireless-02/10
The start-up sequence of the individual building blocks of the internal transmitter is
shown in Figure 9-7 where transmission is actually initiated by the rising edge of
pin 11 (SLP_TR). The radio transceiver state changes from PLL_ON to BUSY_TX and
the PLL settles to the transmit frequency within 1 symbol period. The modulation starts
1 symbol period after the rising edge of SLP_TR. During this time, the internal PA is
initialized.
The control of the external PA is done via the differential pin pair DIG3/DIG4.
DIG3 = H / DIG4 = L indicates that the transmission starts and can be used to enable
the external PA. The timing of pins DIG3/DIG4 can be adjusted relative to the start of
the frame using register bits PA_LT (register 0x16, RF_CTRL_0). For details, refer to
section 7.3.5.
Register 0x04 (TRX_CTRL_1):
The TRX_CTRL_1 register is a multi purpose register to control various operating
modes and settings of the radio transceiver.
Table 9-14. Register 0x04 (TRX_CTRL_1)
• Bit 7 – PA_EXT_EN
This register bit enables pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of
the radio transceiver.
Bit
Name
Read/Write
Reset Value
Bit
Name
Read/Write
Reset Value
7
PA_EXT_EN
R/W
0
3
SPI_CMD_MODE
R/W
0
6
IRQ_2_EXT_EN
R/W
0
2
SPI_CMD_MODE
R/W
0
5
TX_AUTO_CRC_ON
R/W
1
1
IRQ_MASK_MODE
R/W
0
AT86RF212
4
RX_BL_CTRL
R/W
0
0
IRQ_POLARITY
R/W
0
143

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