AT86RF212 Atmel Corporation, AT86RF212 Datasheet - Page 38

• Manufacturer Part Number: AT86RF212
• Manufacturer: Atmel Corporation

Specifications of AT86RF212

• Max. Operating Frequency: 0 MHz
• Crypto Engine: AES
• Operating Voltage (vcc): 1.8 to 3.6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

5.1.4.5 Reset Procedure
5.1.4.6 State Transition Timing Summary
Table 5-1. State Transition Timing
38
No.
1
2
3
4
Symbol
t
t
t
t
TR1
TR2
TR3
TR4
AT86RF212
P_ON
SLEEP
TRX_OFF
TRX_OFF
Transition
until CLKM
available
TRX_OFF
SLEEP
PLL_ON
The radio transceiver reset procedure is shown in Figure 5-7.
Figure 5-7. Reset Procedure
/RST = L sets all registers to their default values. Exceptions are register bits
CLKM_CTRL (register 0x03, TRX_CTRL_0), refer to section 7.7.4. After releasing the
reset pin (/RST = H), the wake-up sequence including an FTN calibration cycle is
performed, refer to section 7.9. After that, the TRX_OFF state is entered.
Figure 5-7 illustrates the reset procedure once P_ON state was left and the radio
transceiver was not in SLEEP state.
The reset procedure is identical for all originating radio transceiver states except of
states P_ON and SLEEP. Instead, the procedures described in sections 5.1.2.1 and
5.1.2.2 must be followed to enter the TRX_OFF state. If the radio transceiver was in
SLEEP state, the XOSC and DVREG are enabled before entering TRX_OFF state.
Notes
• The reset impulse should have a minimum length t
• An access to the device should not occur earlier than t
• A reset overrides an SPI command that might be queued.
Transition timings are listed in Table 5-1 and do not include SPI access time if not
otherwise stated. See measurement setup in Figure 3-1.
refer to section 10.4, parameter 10.4.13.
Time, typ.
35 cycles
of CLKM
330 µs
380 µs
200 µs
Comments
Depends on crystal oscillator setup (Siward A207-011, C
pF) and external capacitor at DVDD (CB3 = 1 µF nom.)
Depends on crystal oscillator setup (Siward A207-011, C
pF) and external capacitor at DVDD (CB3 = 1 µF nom.);
TRX_OFF state indicated by IRQ_4 (AWAKE_END)
For f
Depends on external capacitor at AVDD (CB1 = 1 µF nom.);
register bit TRX_OFF_AVDD_EN (register 0x0c, TRX_CTRL_2) is
not set; for details, refer to section 7.8.3
CLKM
> 250 kHz
10
as specified in section 10.4.
11
after releasing the pin /RST;
8168C-MCU Wireless-02/10
L
L
= 10
= 10