MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 108

• Manufacturer Part Number: MPC8572DS
• Description: KIT MPU POWERQUICC III
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8572DS

• Contents: Board
• Data Rate: 10 Mbps to 100 Mbps
• Memory Type: Flash, DDR, DDR2, DDR3, SDRAM
• Interface Type: I2C, Ethernet
• Operating Voltage: 3.3 V
• Data Bus Width: 32 bit
• Product: Development Tools
• Silicon Manufacturer: Freescale
• Core Architecture: Power Architecture
• Core Sub-architecture: PowerQUICC
• Silicon Core Number: MPC85xx
• Silicon Family Name: PowerQUICC III
• Rohs Compliant: Yes
• For Use With/related Products: MPC8572E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Package Description
108
SD1_TX[6]
SD1_TX[5]
SD1_TX[4]
SD1_TX[3]
SD1_TX[2]
SD1_TX[1]
SD1_TX[0]
SD1_TX[7:0]
SD1_PLL_TPD
SD1_REF_CLK
SD1_REF_CLK
Reserved
Reserved
Reserved
Reserved
SD2_RX[3:0]
SD2_RX[3:0]
SD2_TX[3]
SD2_TX[2]
SD2_TX[1]
Signal
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
PCIe1 Tx Data Lane 6 / SRIO or
PCIe2 Tx Data Lane 2 / PCIe3
TX Data Lane 0
PCIe1 Tx Data Lane 5 / SRIO or
PCIe2 Tx Data Lane 1
PCIe1 Tx Data Lane 4 / SRIO or
PCIe2 Tx Data Lane 0
PCIe1 Tx Data Lane 3
PCIe1 Tx Data Lane 2
PCIe1 Tx Data Lane 1]
PCIe1 Tx Data Lane 0
Transmit Data (negative)
PLL Test Point Digital
PLL Reference Clock
PLL Reference Clock
Complement
Receive Data (positive)
Receive Data (negative)
SGMII Tx Data eTSEC4
SGMII Tx Data eTSEC3
SGMII Tx Data eTSEC2
Table 76. MPC8572E Pinout Listing (continued)
Signal Name
—
—
—
—
SerDes (x4) SGMII
L24
K26
J24
G24
F26
E24
D26
M27, L25, K27, J25,
G25, F27, E25, D27
J32
H32
H31
C29, K32
C30, K31
C24, C25, H26, H27
AL20, AL21
AK32, AJ30, AF30,
AE32
AK31, AJ29, AF29,
AE31
AH26
AG24
AE24
Package Pin Number
Pin Type
—
—
—
—
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
Freescale Semiconductor
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
XV
Supply
Power
DS1
DS1
DS1
DS1
DS1
DS1
DS1
DS1
DS1
DS1
DS1
DS2
DS2
DS2
DS2
DS2
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
DD_SR
—
—
—
—
Notes
17
26
27
28
29
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—